基于EMIF总线的FPGA动态配置方案设计与实现  

Design and Implementation of FPGA Dynamic Configuration Scheme Based on EMIF Bus

作　　者：于长海 YU Changhai(The 3rd Military Representative Office in Tianjin,Beijing Bureau of Naval Equipment Department,Tianjin 300130,China)

机构地区：[1]海装北京局驻天津地区第三军事代表室,天津300130

出　　处：《计算机与网络》2020年第21期64-68,共5页Computer & Network

摘　　要：提出一种FPGA的动态配置方案,方案提供了一种FPGA芯片的Slave SelectMAP配置方式,用DSP芯片作为FPGA的外部配置控制器,利用EMIF总线完成配置数据和时钟信号的输出,利用DSP的部分IO管脚完成FPGA相关配置信号的控制,实现了对于FPGA配置文件的灵活加载和动态重构功能。对于FPGA与DSP芯片的组合,设计中FPGA的配置方式给出一种实用化的高性能解决方法,对于实际工程应用具有重要的参考价值。A dynamic configuration scheme of FPGA is proposed,which provides a slave Selectmap configuration mode of FPGA chip.In this scheme,the DSP chip is used as the external configuration controller of FPGA,the EMIF bus is used to implement the output of configuration data and clock signal,and some IO pins of DSP chip is used to implement the control of FPGA related configuration signal for the flexible loading and dynamic reconstruction of FPGA configuration file.For the combination design of FPGA and DSP chip,a practical high-performance solution is proposed for the configuration of FPGA,which has an important reference value for practical engineering applications.

关 键 词：FPGA动态配置 EMIF总线 DSP Slave SelectMAP 

分 类 号：TP393[自动化与计算机技术—计算机应用技术]