Camera Link图像数据接口的FPGA实现  

FPGA Implementation of Camera Link Image Data Interface

作　　者：甄国涌[1] 何方城 单彦虎[1] ZHEN Guo-yong;HE Fang-cheng;SHAN Yan-hu(North University of China,The Ministry of Education Key Laboratory for Instrument Science and Dynamic Test,National Key Laboratory for Electronic Measurement Technology,Taiyuan 030051,China)

机构地区：[1]中北大学,仪器科学与动态测试教育部重点实验室,电子测试技术国家重点实验室,山西太原030051

出　　处：《仪表技术与传感器》2020年第11期36-39,共4页Instrument Technique and Sensor

摘　　要：针对当前利用Camera Link接口进行图像数据传输所使用的专用转接芯片,会占用大量硬件空间和I/O口资源的问题,结合实际领域对于产品小型化、低成本的需求,提出了一种Camera Link图像数据接口的FPGA实现方案。运用硬件描述语言VHDL对图像接收逻辑进行设计,为FPGA内部IP核进行模块化配置,直接利用主控制器FPGA来实现Camera Link接口,使LVDS图像数据不通过转接芯片,也能够进行解串接收和数据处理。经时序信号仿真和误码率测试,验证了该接口方案设计的正确性,具有高可靠性和实际利用价值。Aiming at the problem that the dedicated transfer chip currently used for image data transmission using the Camera Link interface will occupy a large amount of hardware space and I/O port resources,a camera link image was proposed in combination with the actual field for product miniaturization and low cost FPGA implementation of the data interface.The hardware description language VHDL is used to design the image receiving logic,modularize the FPGA internal IP core,and directly use the main controller FPGA to implement the Camera Link interface,so that LVDS image data to receive and process the data with⁃out transferring the chip.The timing signal simulation and bit error rate test verify the correctness of the design of the interface scheme.The effective data transmission rate is 90 MB/s,which has high reliability and practical value.

关 键 词：Camera Link接口 FPGA LVDS 图像数据 串并转换 

分 类 号：TP273[自动化与计算机技术—检测技术与自动化装置]