前端电路设计对ADC的SFDR影响  

Influence of Front-end Circuit Design on SFDR of ADC

作　　者：刘文政[1] 王德恒 LIU Wen-zheng;WANG De-heng(The 723 Institute of CSIC,Yangzhou 225101,China)

机构地区：[1]中国船舶重工集团公司第七二三研究所,江苏扬州225101

出　　处：《舰船电子对抗》2020年第5期108-111,共4页Shipboard Electronic Countermeasure

摘　　要：模数转换器(ADC)广泛应用于雷达与电子战系统中,无杂散动态范围(SFDR)是其中的一项重要性能指标。ADC电路设计中需要从时钟、电源以及前端电路等多个层次进行系统优化设计,才能有效提高SFDR性能。分析了ADC的前端电路对SFDR性能的影响,并提出了前端电路器件选型和设计的要点,对其他ADC电路设计有参考意义。Analog-to-digital converters(ADC)are widely used in radar and electronic warfare systems.Spurious-free dynamic range(SFDR)is an important performance indicator.In ADC circuit design,the system optimization design needs to be carried out from multiple levels such as clock,power supply and front-end circuit to effectively improve SFDR performance.This article analyzes the impact of ADC front-end circuit on the SFDR performance,and puts forward the key points of selection and design of the front-end circuit devices,which has reference significance for the design of other ADC circuits.

关 键 词：模拟数字转换器 无杂散动态范围 前端电路 

分 类 号：TN792[电子电信—电路与系统]