基于嵌入式的高帧频图像压缩处理装置的设计  

Design of High Frame Rate Image Compression Processing Device Based on Embedded

作　　者：孟凡轶 张会新[1,2] 刘畅[1,2] 董钧港 MENG Fanyi;ZHANG Huixin;LIU Chang;DONG Jungang(MOE Key Laboratory of Instrumentation Science&Dynamic Measurement Technology,North University of China,Taiyuan 030051,China;National Key Laboratory for Electronic Measurement Technology,North University of Chain,Taiyuan 030051,China;Beijing Capital Aerospace Machinery Co.LTD,Beijing 100076,China)

机构地区：[1]中北大学仪器科学与动态测试教育部重点实验室,太原030051 [2]中北大学电子测试技术重点实验室,太原030051 [3]北京首都航天机械有限公司,北京100076

出　　处：《电子器件》2020年第6期1385-1390,共6页Chinese Journal of Electron Devices

基　　金：国家自然科学基金青年科学基金项目(51705475)。

摘　　要：针对某些火箭或导弹发射后需要将捕捉到的图像进行压缩处理的需求,设计了一种以FPGA为主控芯片,ADV212为压缩电路核心的高帧频图像压缩处理装置,该装置实现了图像采集、存储、压缩电路的设计,逻辑控制部分划分了LVDS图像采集模块,存储芯片缓存模块,ADV212压缩模块等对图像信息进行处理,最终使捕捉到的图像经过压缩处理后显示出较好的效果。经过多次的实验测试及仿真,该装置可达到最高100帧/s的压缩速度且能实时处理图像数据,解决了火箭发射过程中无法实时检测的问题,传回的图像解码后较为清晰,失真度较小,可靠性强。For certain rocket or missile launch after need to capture the image compression processing requirements,a FPGA is designed as the main control chip,ADV212 is compressed core circuit of high frame frequency image compression processing device,the device realizes the image acquisition,storage,compression of the circuit design,logic control section dividing an LVDS image acquisition module,memory chip cache module,ADV212 compression module of image information processing,eventually captured images show better effect after dealing with the compression.After a number of experimental tests and simulation,the device can achieve the maximum compression speed of 100 frames/s and can process image data in real time,which solves the problem that cannot be detected in real time during the rocket launch process.

关 键 词：图像压缩 ADV212 FPGA 高帧频 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]