一种基于自适应偏置的2.4 GHz CMOS功率放大器  

A 2.4 GHz CMOS Power Amplifier with Adaptive Bias Circuit

作　　者：陈福栈 罗彦彬 甘业兵[1,2,3] 乐建连 CHEN Fuzhan;LUO Yanbin;GAN Yebing;LE Jianlian(Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,P.R.China;University of Chinese Academy of Sciences,Beijing 100049,P.R.China;Hangzhou Zhongke Microelectronics Co.,Ltd.,Hangzhou 310053,P.R.China)

机构地区：[1]中国科学院微电子研究所,北京100029 [2]中国科学院大学,北京100049 [3]杭州中科微电子有限公司,杭州310053

出　　处：《微电子学》2020年第6期817-822,共6页Microelectronics

摘　　要：提出了一种单端自适应偏置电路,该电路能够根据输入信号功率,动态地调整输出直流电压,以提升射频功率放大器(PA)的线性度及功率回退区域的效率。为验证该电路的功能,设计了一种2.4 GHz PA,该电路基于单端三级结构设计,采用0.18μm CMOS工艺制造,电路输入及输出阻抗匹配网络均集成于片内。测试结果表明,PA的增益为26.8 dB,S11和S22均小于-10 dB,OP1 dB为23.5 dBm,功率回退6 dB点PAE和峰值PAE分别为14%和24%。该PA对WLAN、ZigBee等2.4 GHz设备具有一定的应用价值。A single-port adaptive bias circuit was proposed, which could adjust bias voltage according to the power level of inputting signal so as to enhance power amplifier(PA)’s back-off efficiency and linearity. To verify the function of the adaptive bias circuit, a 2.4 GHz power amplifier was designed based on single-ended three-stage structure and manufactured in a 0.18 μm CMOS process. The input and output impedance matching networks of the PA were both implemented on-chip. Measurement results showed that the PA had gain of 26.8 dB, with S11 and S22 both less than-10 dB. The output 1 dB compression point of the PA was 23.5 dBm while the back-off 6 dB PAE and peak PAE of the PA was 14% and 24% respectively. Therefore, the PA possessed application prospect for 2.4 GHz applications such as WLAN and ZigBee devices.

关 键 词：自适应偏置电路 CMOS 功率放大器 线性度 

分 类 号：TN722.75[电子电信—电路与系统] TN432