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作 者:经龙 秦会斌[1] 胡炜薇[1] JING Long;QIN Huibin;HU Weiwei(Institute of New Electron Device&Application,Hangzhou Dianzi University,Hangzhou 310018,China)
机构地区:[1]杭州电子科技大学新型电子器件与应用研究所,浙江杭州310018
出 处:《电子元件与材料》2021年第1期59-64,71,共7页Electronic Components And Materials
基 金:浙江省科技计划项目(2017C01027)。
摘 要:采用TSMC 0.13 μm 1P6M CMOS工艺,设计了一种用于射频集成电路的高Q值、高耦合的叠层片上变压器。采用叠层差分结构,初级线圈和次级线圈上下完全重合,提高线圈的耦合效率及初次级线圈的品质因数Q。同时采用背硅刻蚀工艺改进衬底,减少衬底涡流损耗。研究了线圈直径d、宽度w和间距s对变压器性能的影响。应用安捷伦ADS Momentum软件,对所设计的片上变压器进行电磁场S参数仿真验证。结果表明,该变压器在4.2 GHz时品质因数Q值达到最大值13.4,在1~10 GHz频率范围内耦合系数K为0.8~1,最大可用增益G(max)接近于0.9,可应用于硅基射频集成电路设计中改善电路性能。A high quality factor and high-coupling stacked on-chip transformer was designed for radio frequency integrated circuits by TSMC 0.13μm 1 P6 M CMOS technology.To improve the coupling efficiency and the quality factor of the coil,the primary and the secondary coils were overlapped.Back silicon etching process was used to reduce the eddy current loss of the substrate.The effect of coil’s diameter,width and space were discussed.The S-parameter simulation of the designed on-chip transformer was carried out using the Agilent ADS Momentum software.The results show that the maximum quality factor can reach up to 13.4 at 4.2 GHz,the coupling-coefficient K is 0.8-1 from 1 GHz to 10 GHz,and the maximum available gain Gmax is~0.9.The transformer can be used for the design of silicon-based RF integrated circuit to improve the circuit performance.
关 键 词:射频集成电路 高耦合 叠层 片上变压器 背硅刻蚀工艺 最大可用增益
分 类 号:TN609[电子电信—电路与系统]
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