一种用于晶振芯片中的基准源电路设计  

Design of a reference circuit used in crystal chip

作　　者：谭传武[1] 刘红梅[1] TAN Chuanwu;LIU Hongmei(Department of Communication and Signal,Hunan Railway Professional Technology College,Zhuzhou 412001,China)

机构地区：[1]湖南铁道职业技术学院电务学院,湖南株洲412001

出　　处：《电子设计工程》2021年第2期67-71,共5页Electronic Design Engineering

基　　金：湖南省自然科学基金项目(2020JJ7052);湖南省教育厅科学研究项目(19B380);湖南铁道职业技术学院青年科研骨干培养项目。

摘　　要：随着人工智能时代电子产品的智能化飞速发展,对手机等终端的要求越来越高,该文结合传统的带隙基准电路原理,分析其优缺点并改进了带隙基准电路。改进的电路包括启动电路模块、带隙核心模块、运放模块等3部分,启动电路取消了电容结构,使得电路能加速启动。采用PNP三极管匹配3个等尺寸的PMOS管设计了带隙核心电路,采用差分+共源结构设计了高增益的运放;仿真结果表明,在-20~+80℃温度范围内,基准电路的温度系数约6.9 ppm/℃,在10 kHz的频率范围内电源抑制比(PSRR)可达到-53 dB以上。With the rapid development of intelligent electronic products in the era of artificial intelligence,the requirements for mobile phones and other terminals are higher and higher.This paper analyzes the advantages and disadvantages of the traditional band gap reference circuit and improves the band gap reference circuit.The improved circuit includes three parts:the starting circuit module,the band gap core module,and the operational amplifier module.The starting circuit cancels the capacitor structure,which makes the electric circuit can accelerate the start-up.The core circuit of band gap is designed by using PNP triode to match three equal size PMOS,and the high gain operational amplifier is designed by using differential+common source structure.The simulation results show that in the temperature range of from-20℃to 80℃,the temperature coefficient of band gap is about 6.9 ppm/℃,and the PSRR can reach more than-53 dB in the frequency range of 10 kHz.

关 键 词：压控振荡器 基准源 带隙基准 CMOS 

分 类 号：TN433[电子电信—微电子学与固体电子学]