基于FPGA的PPM调制解调系统设计  

Design of PPM modulation and demodulation system based on FPGA

作　　者：侯欢 施洪生[1] Hou Huan;Shi Hongsheng(School of Electrical Engineering,Beijing Jiaotong University,Beijing 100044,China)

机构地区：[1]北京交通大学电气工程学院,北京100044

出　　处：《电子技术应用》2021年第2期92-96,共5页Application of Electronic Technique

摘　　要：针对旋转件参数的测试及传输,提出了一种基于FPGA红外数据传输的PPM调制解调系统的设计,并且在数据传输过程中加入了CRC校验,增加了数据传输过程的准确性。设计采用了Altera(Intel)的Cyclone10系列的10CL016YU256C8芯片,具有高速、高带宽、高容量等特点,适用于高速数据通信。通过Quartus II开发平台,用Verilog HDL硬件描述语言编写相应的调制、解调以及CRC校验程序。介绍了4PPM调制、解调的算法,以及CRC-CCITT校验码的算法,并通过Modelsim对系统进行了时序仿真,仿真结果验证了设计的正确性。For the test and transmission of rotating parts parameters,a design of a PPM modulation and demodulation system based on FPGA infrared data transmission is proposed,and a CRC check is added in the data transmission process,which increases the accuracy of the data transmission process.This design uses Altera(Intel)′s Cyclone10 series 10CL016YU256C8 chip,which has the characteristics of high speed,high bandwidth,high capacity,etc.,suitable for high-speed data communication.Through the Quartus II development platform,it uses Verilog HDL hardware description language to write the corresponding modulation,demodulation and CRC verification programs.The paper introduces the algorithm of 4PPM modulation and demodulation,as well as the algorithm of CRC-CCITT check code,and carries on the timing simulation to the system through Modelsim.The simulation result verifies the correctness of the design.

关 键 词：PPM调制解调 CRC校验 FPGA Verilog HDL 

分 类 号：TN919[电子电信—通信与信息系统]