基于FPGA的两级冗余编码系统  

Two-level Redundant Coding System Based on FPGA

作　　者：李圣昆[1] 郝少帅 杨玉华[1] 王淑琴[1] 李金 LI Shengkun;HAO Shaoshuai;YANG Yuhua;WANG Shuqin;LI Jin(Key Laboratory of Instrumental Science and Dynamic Testing of Ministry of Education, North University of China, Taiyuan 030051, China;Shanghai Institute of Aerospace Electronic Technology, Shanghai 201109,China)

机构地区：[1]中北大学仪器科学与动态测试教育部重点实验室,山西太原030051 [2]上海航天电子技术研究所,上海201109

出　　处：《探测与控制学报》2021年第1期102-106,共5页Journal of Detection & Control

摘　　要：针对恶劣条件下,数据远距离传输中可靠性不高的问题,提出了基于FPGA的两级冗余编码系统。该系统通过硬件优化和软件优化相结合的方式,来提高数据传输过程中的稳定性。在硬件电路中,通过添加驱动器和均衡器,增强信号的传输能力;在软件逻辑方面,通过两级嵌套编码,字内编码实现字内的一位纠错,字间编码实现字内的多位纠错,字内纠错和字间纠错相结合的编码方式,来实现对数据传输过程的纠错。环境试验结果表明,在240 m的双绞线上,两级冗余编码的传输系统可以以600 Mb/s的速率正确传输。相对于单一编码方式编码,两级冗余编码方案极大地降低了数据传输过程中的误码率,提高了传输系统的可靠性。Aiming at the problem of low reliability in long-distance data transmission under severe conditions,a two-level redundant coding scheme was proposed.The solution combined hardware optimization and software optimization to improve the stability of the data transmission process.In the hardware circuit,by adding a driver and an equalizer,the signal transmission capability was enhanced;in terms of software logic,two-level nested coding,intra-word coding realizes one-bit error correction within a word,and inter-word coding realized multiple intra-words bit error correction,a coding method that combined intra-word error correction and inter-word error correction to realize error correction during data transmission.Environmental test results showed that,on a 240 m twisted pair cable,a two-level redundant coding transmission system could correctly transmit at a rate of 600 Mbit/s.Compared with the single coding method,the two-level redundant coding scheme greatly reduced the bit error rate in the data transmission process and improved the reliability of the transmission system.

关 键 词：高速传输 远距离 纠错码 两级冗余校验 无误码 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]