基于FPGA和DDR3 SDRAM的高精度脉冲发生器设计与实现  

Design and implementation of high precision pulse generator based on FPGA and DDR3 SDRAM

作　　者：施赛烽 叶润川 林雪 徐南阳 SHI Saifeng;YE Runchuan;LIN Xue;XU Nanyang(School of Electronic Science and Applied Physics, Hefei University of Technology, Hefei 230601, China)

机构地区：[1]合肥工业大学电子科学与应用物理学院,安徽合肥230601

出　　处：《合肥工业大学学报（自然科学版）》2021年第2期206-209,283,共5页Journal of Hefei University of Technology：Natural Science

基　　金：国家自然科学基金资助项目(JZ2015GJMS0449)。

摘　　要：文章介绍了一种基于现场可编程门阵列(field-programmable gate array,FPGA)和第三代双倍速率同步动态随机存储器(third generation of double-data-rate synchronous dynamic random-access memory,DDR3 SDRAM)的1 ns精度脉冲发生器的实现方案。该设计在提高精度和增加指令存储空间的同时,兼顾了2 ns精度脉冲发生器多通道、可编程、可与外部时钟同步等特点。最后,通过金刚石中的氮-空位(nitrogen-vacancy,NV)电子自旋拉比振荡实验验证了1 ns精度脉冲发生器相对于2 ns精度脉冲发生器的优越性。This paper introduces an implementation scheme of 1 ns precision pulse generator based on field-programmable gate array(FPGA)and third generation of double-data-rate synchronous dynamic random-access memory(DDR3 SDRAM).While improving the accuracy and increasing the instruction storage space,this design still maintains the characteristics of the 2 ns precision pulse generator,such as multi-channel,programmability,and synchronization with external clock.Finally,the superiority of this design over the 2 ns precision pulse generator is verified through the Rabi oscillation experiment of the electron spin in nitrogen-vacancy(NV)in diamond.

关 键 词：现场可编程门阵列(FPGA) 第三代双倍速率同步动态随机存储器(DDR3 SDRAM) 脉冲发生器 量子信息 拉比振荡 

分 类 号：TN782[电子电信—电路与系统] TN791