基于FPGA的有色Petri网仿真系统设计  

Design of Colored Petri Net Simulation System Based on FPGA

作　　者：陈成官 张小军 周韬略 张德学 郭华 CHEN Chengguan;ZHANG Xiaojun;ZHOU Taolue;ZHANG Dexue;GUO Hua(Shandong University of Science and Technology,College of Electronic and Information Engineering,Qingdao Shandong 266590,China)

机构地区：[1]山东科技大学电子信息工程学院,山东青岛266590

出　　处：《电子器件》2021年第1期236-241,共6页Chinese Journal of Electron Devices

基　　金：山东省自然科学基金联合基金项目(ZR2019ZLH001);山东省重点研发计划项目(2019GGX101066);山东省高等学校青创科技计划项目(2019KJN024,2019KJN020)。

摘　　要：为了实现大规模有色Petri网模型的性能测试,设计了基于FPGA的高速仿真系统。该系统实现了库所、变迁模块到硬件结构的映射,采用C语言实现了有色Petri网的硬件自动生成工具。通过分析有色Petri网的特征,该工具生成对应的Verilog代码和基于Quartus的自动脚本。以通信中"包传输"的模型为例,在FPGA中对生成的代码进行测试,验证了设计的正确性。In order to perform test of the large-scale colored Petri nets,a high-speed simulation system based on FPGA is designed. It implements the mapping of the place and transition modules to the hardware structures,and adopts C language to implement the hardware automatic generation tool for colored Petri nets. By analyzing the characters of the colored Petri nets,the tool generates the corresponding Verilog code and Quartus-based automatic script. Taking the model of"packet transmission"in communication as an instance,the generated code is tested in FPGA to verify its correctness.

关 键 词：有色PETRI网 自动生成工具 FPGA Verilog HDL 仿真系统 

分 类 号：TP319[自动化与计算机技术—计算机软件与理论]