多通道低相噪同步频率源设计  

Design of multi-channel low phase noise synchronous frequency source

作　　者：胥伟 潘明海[1] 张艳睛 Xu Wei;Pan Minghai;Zhang Yanjing(School of Electronic Information Engineering,Nanjing University of Aeronautics and Astronautics,Nanjing 211106,China)

机构地区：[1]南京航空航天大学电子信息工程学院,江苏南京211106

出　　处：《电子技术应用》2021年第3期97-101,114,共6页Application of Electronic Technique

摘　　要：针对数字射频存储器(Digital Radio Frequency Memory,DRFM)系统在进行对外部输入信号采集时,对高稳频率源需求问题,提出了一种基于两级锁相环的多通道低相噪同步频率源设计方法,实现了6路在2.26~2600 MHz范围内任意频率信号输出。通过线性叠加的方法,理论分析了锁相环中相位噪声的模型,并根据相位噪声的来源进行优化设计。最后对频率源电路杂散和相位噪声进行测试,测试结果表明该频率源电路输出1.25 GHz频率时的杂散抑制优于-60 dBc,相位噪声抑制优于-104.91 dBc/Hz@500kHz。In order to meet the requirement of high stability frequency source when DRFM(Digital Radio Frequency Memory)system collects external input signals,a design method of multi-channel,low phase noise synchronous frequency source based on two-stage PLL is proposed in this paper.Six channels of arbitrary frequency signal output in the range of 2.26~2600 MHz are realized.Through the method of linear superposition,the phase noise model of PLL is analyzed theoretically,and the optimal design is carried out according to the source of phase noise.Finally,the spurious and phase noise of the frequency source circuit are tested.The test results show that the spurious suppression is better than-60 dBc and the phase noise suppression is better than-104.91 dBc/Hz@500kHz when the frequency source circuit outputs 1.25 GHz frequency.

关 键 词：频率源 锁相环 相位噪声 杂散 

分 类 号：TN95[电子电信—信号与信息处理]