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作 者:Yue Hao Huaqiang Wu Yuchao Yang Qi Liu Xiao Gong Genquan Han Ming Li
机构地区:[1]School of Microelectronics,Xidian University,Xi’an 710071,China [2]Institute of Microelectronics,Tsinghua University,Beijing 100084,China [3]Department of Micro/nanoelectronics,Peking University,Beijing 100871,China [4]Frontier Institute of Chip and System,Fudan University,Shanghai 200438,China [5]Department of Electrical and Computer Engineering,National University of Singapore,Singapore 117546,Singapore [6]Institute of Semiconductors,Chinese Academy of Sciences,Beijing 100083,China
出 处:《Journal of Semiconductors》2021年第2期1-2,共2页半导体学报(英文版)
摘 要:In the past few decades,the Moore’s Law has been the revolutionary force for our integrated circuit(IC)industry.However,the tremendous challenges faced in continuous transistor physical down-scaling and the unprecedented demands for computing and storage capabilities require our urgent search for strategies and solutions to integrate diverse materials,devices,circuits,and architectures in a 3D vertically stacked manner so that they can orchestrate in the most effective way to provide significantly enhanced functionalities as well as superior speed,energy,bandwidth,form fact,and cost.
关 键 词:Integration SCALING INTEGRATE
分 类 号:TN43[电子电信—微电子学与固体电子学]
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