Design technology co-optimization towards sub-3 nm technology nodes  

作　　者：Genquan Han Yue Hao 

机构地区：[1]School of Microelectronics,Xidian University,Xi’an 710071,China

出　　处：《Journal of Semiconductors》2021年第2期6-8,共3页半导体学报（英文版）

摘　　要：Over the past half century,Moore’s Law has played a crucial role in the development of the semiconductor field,which depends on straightforwardly dimensional scaling with approximately a two-year cadence.Significant benefits of performance,power,area,and cost(PPAC)in microchips are expected at each technology node.However,aggressive pitchbased scaling by resolution enhancement techniques becomes increasingly challenging to sustain.

关 键 词：SCALING optimization STRAIGHT 

分 类 号：TN43[电子电信—微电子学与固体电子学]