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作 者:Zhaowu Tang Chunsen Liu Senfeng Zeng Xiaohe Huang Liwei Liu Jiayi Li Yugang Jiang David Wei Zhang Peng Zhou
机构地区:[1]State Key Laboratory of ASIC and System,School of Microelectronics,Fudan University,Shanghai 200433,China [2]School of Computer Science,Fudan University,Shanghai 200433,China
出 处:《Journal of Semiconductors》2021年第2期100-107,共8页半导体学报(英文版)
基 金:This work was supported by the National Natural Science Foundation of China(61925402,61851402 and 61734003);Science and Technology Commission of Shanghai Municipality(19JC1416600);National Key Research and Development Program(2017YFB0405600);Shanghai Education Development Foundation and Shanghai Municipal Education Commission Shuguang Program(18SG01);China Postdoctoral Science Foundation(2019M661358,2019TQ0065).
摘 要:The recently reported quasi-nonvolatile memory based on semi-floating gate architecture has attracted extensive attention thanks to its potential to bridge the large gap between volatile and nonvolatile memory.However,the further extension of the refresh time in quasi-nonvolatile memory is limited by the charge leakage through the p-n junction.Here,based on the density of states engineered van der Waals heterostructures,the leakage of electrons from the floating gate to the channel is greatly suppressed.As a result,the refresh time is effectively extended to more than 100 s,which is the longest among all previously reported quasi-nonvolatile memories.This work provides a new idea to enhance the refresh time of quasi-nonvolatile memory by the density of states engineering and demonstrates great application potential for high-speed and low-power memory technology.
关 键 词:quasi-nonvolatile memory refresh time density of states engineering
分 类 号:TP333[自动化与计算机技术—计算机系统结构]
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