基于FPGA的集成式测试系统的设计与实现  

Design and implementation of the integrated test system based on FPGA

作　　者：钱宏文[1] 付强 杨文豪 QIAN Hongwen;FU Qiang;YANG Wenhao(No.58 Research Institute,China Electronics Technology Group Corporation,Wuxi 214035,China)

机构地区：[1]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《电子设计工程》2021年第5期75-79,共5页Electronic Design Engineering

摘　　要：为实现简单可靠的板卡功能扩展,设计了一种基于FPGA控制的集成式测试系统,给出了背板总线的详细设计,并讨论了背板总线的数据同步、仲裁机制等关键设计,介绍了基于CY7C68013A芯片的USB2.0总线设计、功能卡的数据传输模式。该系统背板总线具备50 MB/s的瞬时传输速率,支持最多挂接6块功能卡同时工作,目前已成功应用于某产品研制过程中的环境试验。In order to realize simple and reliable board function expansion,an integrated test system based on FPGA is designed,the detailed design of backplane bus is introduced and the key design of data synchronization,arbitration mechanism and so on are discussed.The design of USB2.0 bus based on CY7C68013A chip and the transmission mechanism of the function sub card are also introduced.The backplane bus has a 50 MB/s instantaneous transmission rate and supports the simultaneous operation of up to six function cards.It has been successfully applied to the environmental test in the process of some product development.

关 键 词：FPGA 背板总线 数据同步 仲裁机制 CY7C68013A 

分 类 号：TN99[电子电信—信号与信息处理]