微处理器下的数字集成电路测试系统设计  

Design of Digital Integrated Circuit Test System Based on Microprocessor

作　　者：郑宇 方岚 李苏苏 谢玉巧 Zheng Yu;Fang Lan;Li Susu;Xie Yuqiao(East China Institute of optoelectronic integrated devices,Jilin 132001,China)

机构地区：[1]华东光电集成器件研究所,吉林吉林132001

出　　处：《计算机测量与控制》2021年第3期27-31,共5页Computer Measurement &Control

摘　　要：设计一种基于微处理器嵌入结构的数字集成电路测试系统;该系统在保留了传统数字集成电路测试系统使用的布尔差分算法的基础上,将布尔差分算法形成的中间大数据进行模糊神经网络的进一步分析,使得布尔差分算法获得可测故障捕捉结果的同时,将不可测故障进行充分捕捉;最终设计一款提供30×30固定快插式引脚且运行在最大750MHz频率上的数字集成电路测试系统;经过实测,发现升级后算法在测试敏感度和特异度方面均获得提升;该技术革新成果将对高复杂度硬件系统的测试工作带来显著的效率提升。A digital integrated circuit test system based on microprocessor embedded structure is designed.On the basis of retaining the Boolean difference algorithm used in the traditional digital IC test system,the system further analyzes the middle big data formed by the Boolean difference algorithm to the fuzzy neural network,so that the Boolean difference algorithm can obtain the measurable fault capture results and fully capture the unmeasurable fault.Finally,a digital integrated circuit test system with 30×30 fixed fast pin is designed,which runs at the maximum frequency of 750 MHz.After testing,it is found that the test sensitivity and specificity of the upgraded algorithm are improved.The results of this technical innovation will bring significant efficiency improvement to the test work of high complexity hardware system.

关 键 词：芯片测试 数字集成电路 布尔差分算法 机器学习 模糊神经元网络 

分 类 号：TP183[自动化与计算机技术—控制理论与控制工程]