一种GaN半桥驱动器电平移位电路设计  

A Level Shifter for Half-Bridge GaN Driver

作　　者：成松林 向乾尹[1] 冯全源[1] CHENG Songlin;XIANG Qianyin;FENG Quanyuan(Institute of Microelectronics,Southwest Jiaotong University,Chengdu 611756,P.R.China)

机构地区：[1]西南交通大学微电子研究所,成都611756

出　　处：《微电子学》2021年第1期28-32,共5页Microelectronics

基　　金：国家自然科学基金资助项目(61771408,61531016)。

摘　　要：GaN半桥输出点电压在死区时间为负值,给GaN功率器件栅极驱动电路信号通信带来了挑战。通过研究驱动器电平移位锁存电路工作状态与半桥功率级输出节点电压跳变、死区时间负压之间的相互影响,设计了一种新型的零静态功耗电平移位电路及其误触发消除电路。电路采用100 V BCD 0.18μm工艺设计,在输入电压100 V、开关频率5 MHz的GaN半桥变换器中对版图进行了后仿真。仿真结果表明,当半桥功率级输出节点分别为-3 V和100 V时,延时为4.5 ns和1.5 ns。GaN half-bridge output voltage is negative during deadtime, and it brings a challenge to the signal communication of gate drive circuit of GaN power device. A novel level shifter with false eliminating circuit and zero quiescent current was designed through studying the mutual effects between the state of the level shift latch circuit, half bridge output voltage jumping and its negative pressure in deadtime. The circuit was designed in a 100 V BCD 0.18 μm process, and the layout was post-simulated in a GaN half-bridge converter with input voltage of 100 V and switching frequency of 5 MHz. The simulation showed that the delay was 4.5 ns and 1.5 ns when the half-bridge output voltage was-3 V and 100 V, respectively.

关 键 词：GaN驱动 电平移位电路 开关电源 DC-DC降压变换器 

分 类 号：TN433[电子电信—微电子学与固体电子学]