基于FPGA的混合基FFT算法设计与实现  

Design and implementation of mixed-radix FFT algorithm based on FPGA

作　　者：侯晓晨 孟骁 陈昊 HOU Xiaochen;MENG Xiao;CHEN Hao(School of Information and Electronics,Beijing Institute of Technology,Beijing 100081,China)

机构地区：[1]北京理工大学信息与电子学院,北京100081

出　　处：《太赫兹科学与电子信息学报》2021年第2期303-307,共5页Journal of Terahertz Science and Electronic Information Technology

摘　　要：目前,研究资源节约型的低复杂度混合基快速傅里叶变换(FFT)设计技术具有重要的应用价值。本文基于现场可编程逻辑门阵列(FPGA)平台提出并实现了一种新型混合基FFT分解算法。该算法基于原位存储结构设计,采用素数因子分解与库利-图基分解相结合的混合分解模式,在省去了一步旋转因子乘法运算的同时也有效减小了存储空间和运算量,并采用通用蝶形单元模块设计使得算法能够同时适应基2、基3、基4的FFT运算。仿真结果表明,该算法可以极大提高FFT处理点数的灵活性,有效节省运算资源。Recently,researches on resource-saving mixed-radix Fast Fourier Transform(FFT)technology with low complexity and high efficiency are of vital importance in digital signal processing.In this paper,a new mixed-radix FFT decomposition algorithm based on Field Programmable Gate Array(FPGA)is proposed and implemented.The proposed in-place algorithm adopts a hybrid decomposition mode combining prime factorization algorithm and Cooley-Tukey algorithm,which can save one-step multiplication operation of the rotation factor and also reduce the storage space and operation amount effectively,while it also uses the universal butterfly unit module to accommodate to the radix-2,radix-3,and radix-4 FFT operations.The simulation results indicate that the proposed algorithm can greatly improve the flexibility of FFT processing points and effectively save computing resources.

关 键 词：快速傅里叶变换 混合基算法 通用蝶形单元 现场可编程逻辑门阵列 

分 类 号：TN791[电子电信—电路与系统]