基于FPGA的存储芯片测试系统设计  

Design of memory chip Test System based on FPGA

作　　者：王展意 WANG Zhan-yi(University of Electronic Science and Technology of China)

机构地区：[1]电子科技大学

出　　处：《中国集成电路》2021年第5期64-68,73,共6页China lntegrated Circuit

摘　　要：文章介绍了存储器测试的重要性与FPGA测试系统的优势,分析了存储器常见的几种故障模型和存储器测试算法。通过XILINX FPGA芯片搭建了一个SOPC存储器测试系统。在VIVADO中以Microblaze为核心根据待测芯片的接口完成硬件系统的互联,之后在SDK软件中对搭建的硬件系统进行开发,完成了March算法的实现。This paper introduces the importance of memory test and the advantages of FPGA test system,and analyzes several common fault models and memory test algorithms.An SOPC memory test system was built by XILINX FPGA chip.In VIVADO,Microblaze is taken as the core to add GPIO according to the interface signal of the chip to be tested to complete the interconnection of the hardware system.After that,develop the hardware system set up in SDK software and control the signal and data flow of GPIO interface according to the timing sequence of the chip interface.Finally through the custom function to complete the implementation of the March algorithm.

关 键 词：FPGA 存储芯片 SOPC系统 芯片测试 

分 类 号：TN47[电子电信—微电子学与固体电子学]