一种高效的时序转换电路设计与实现  

Design and Implementation of an Efficient Timing Sequence Conversion Circuit

作　　者：杜斐[1] 何嘉文[1] 刘承禹[1] 张骏[1] 田泽[1] DU Fei;HE Jia-wen;LIU Cheng-yu;ZHANG Jun;TIAN Ze(AVIC Computing Technique Research Institute,Xi’an 710068,China)

机构地区：[1]航空工业西安航空计算技术研究所,陕西西安710068

出　　处：《计算机技术与发展》2021年第5期96-101,共6页Computer Technology and Development

基　　金：“型谱”科研项目(1311XJ1700,1311XJ2600-1);中国航空工业集团公司创新基金(2010BD63111)。

摘　　要：嵌入式处理器是目前片上系统中常用的处理器引擎,包括处理器、PLB总线系统、软件驱动等部分,其性能高、功耗低、使用灵活,通过处理器自带的PLB总线,可将成熟IP与嵌入式处理器相连接。由于PLB总线结构复杂,时序多样,且其接口时序与常用的寄存器接口访问时序差距较大,不利于迅速建立成熟IP和PLB总线连接。为解决此问题,首先深入研究了嵌入式处理器内部PLB总线协议和PLB总线各个接口的结构及机制,然后在理解PLB总线系统时序以及内部各子模块的功能与工作机制的基础上,提出一种高效时序转换电路解决方案,以满足PLB总线端单拍传输、Line传输和Burst传输,从设备端同步时序传输、异步时序传输的通信需求。通过功能仿真和工程实践表明,该时序转换电路工作稳定,性能良好,具有配置灵活、使用方便、数据传输效率高等优点,较好地满足了应用需求,且对其他类似接口转换设计具有一定的借鉴意义。Embedded processor is a commonly used processor engine in on-chip system,including processor,PLB bus system,software driver and other parts,with high performance,low power consumption and flexible use.Through PLB bus of processor,mature IP can be connected with embedded processor.Due to the complex structure of PLB bus,diverse timing sequence,and the gap between its interface timing sequence and the commonly used register interface access timing sequence,it is not conducive to the rapid establishment of mature IP and PLB bus connections.To solve this problem,we thoroughly study the PLB bus protocol and the structure and mechanism of PLB bus interface,and then based on the understanding of PLB bus system timing and the function and working mechanism of each sub-module,propose an efficient timing conversion circuit solution to meet the communication requirements of single beat transmission,Line transmission and Burst transmission,synchronous sequential transmission and asynchronous sequential transmission from the device side.Through functional simulation and engineering practice,it is shown that the timing sequence conversion circuit has the advantages of stable operation,excellent performance,flexible configuration,convenient use and high data transmission efficiency,which satisfies the application requirements well and has certain reference significance for other similar interface conversion designs.

关 键 词：嵌入式处理器 PLB总线 同步时序 异步时序 转换电路 

分 类 号：TP39[自动化与计算机技术—计算机应用技术]