基于DSP EMIF+LHB155304的RT终端设计与实现  

Design and implementation of RT terminal based on DSP EMIF+LHB155304

作　　者：任勇峰[1] 吕文强 关瑞云 臧冠宇 Ren Yongfeng;Lyu Wenqiang;Guan Ruiyun;Zang Guanyu(North University of China,Taiyuan 030051,China;96791 Troops,Beijing 100000,China)

机构地区：[1]中北大学,太原030051 [2]96791部队,北京100000

出　　处：《电子测量技术》2021年第3期165-169,共5页Electronic Measurement Technology

摘　　要：针对飞行控制系统中设备之间数据传输的低成本、高可靠性和芯片国产化需求,提出一种基于DSP EMIF+LHB155304的RT终端设计,采用DSP芯片作为主控制器,使用DSP的EMIF接口与国产4 Mbit/s 1553B总线协议芯片LHB155304连接,简化了传统的"DSP+FPGA+协议芯片"架构。为解决前端数据发送系统与后端控制系统数据读取异步问题,配置LHB155304协议芯片为RT双缓冲机制,避免了冲突,保证了数据传输的正确性,最后使用CCS软件的在线调试工具对收发数据进行观察,经验证,收发数据一致,设计稳定可靠,为1553B总线的国产化提供了实际应用经验。For the requirements of low cost,high reliability and chip localization in flight control system,a design of RT terminal based on DSP EMIF+LHB155304 is proposed.Using DSP chip as the main controller,the EMIF interface of DSP is used to connect with domestic 4 Mbit/s 1553 B bus protocol chip LHB155304,simplify the traditional"DSP+FPGA+protocol chip architecture".To solve the problem of asynchronous data reading between the front-end data sending system and the back-end control system,LHB155304 protocol chip is configured as the RT double buffer mechanism to avoid conflicts and ensure the correctness of data transmission.Finally,the online debugging tool of CCS software is used to observe the receiving and receiving data.It has been proved that the receiving and receiving data are consistent,and the design is stable and reliable.It provides practical experience for the localization of 1553 B bus.

关 键 词：DSP EMIF接口 1553B总线 LHB155304 RT模式 

分 类 号：TN919.3[电子电信—通信与信息系统]