基于FPGA的PIE编码与UVM验证平台的设计  

Design of PIE coding based on FPGA and UVM verification platform

作　　者：李姝萱 卜刚[1] Li Shuxuan;Bu Gang(School of Electronic Information Engineering,Nanjing University of Aeronautics and Astronautics,Nanjing 211106,China)

机构地区：[1]南京航空航天大学电子信息工程学院,江苏南京211106

出　　处：《电子技术应用》2021年第6期110-114,共5页Application of Electronic Technique

基　　金：江苏省自然科学基金(BK2012792)。

摘　　要：国际标准ISO/IEC18000-6规定脉冲间隔编码(PIE)作为RFID数字基带系统中阅读器发送链路的编码方式。采用Verilog语言对该模块进行设计,用QuartusⅡ软件综合并下载到FPGA开发板上,并使用SignalTapⅡ逻辑分析仪对信号进行采集和分析。此外,在设计的基础上添加了UART收发模块,实现PC和FPGA板的通信。为了对PIE编码进行充分验证,基于UVM验证方法学和直接编程接口C(DPI-C),设计并实现了一种高效且可复用的验证平台,驱动器和监测器分别实现向DUT发送激励及收集输出结果的功能。参考模型与DUT的输出结果在记分板中对比一致,功能覆盖率达到了100%,提高了验证效率及完备性。The international standard ISO/IEC18000-6 stipulates pulse interval encoding(PIE)as the encoding method of the reader transmission link in the RFID digital baseband system.It uses Verilog language to design the module,synthesizes with Quartus II software and downloads it to FPGA development board,then use SignalTap II logic analyzer to collect and analyzethe signal.In addition,the UART transceiver module is added on the basis of the design to realize the communication between PC and FPGA board.In order to fully verify the PIE code,based on UVM verification methodology and direct programminginterface C(DPI-C),an efficient and reusable verification platform was designed and implemented.The driver and the monitor were implemented to send excitation and the function of collecting output results.The output results of the reference model and DUT are consistent in the scoreboard,and the function coverage reaches 100%,which improves efficiency and completeness of the verification.

关 键 词：脉冲间隔编码 串口 通用验证方法学 直接编程接口 

分 类 号：TN402[电子电信—微电子学与固体电子学]