First-principles Simulations of Tunneling FETs Based on van der Waals MoTe2/SnS2 Heterojunctions with Gate-to-drain Overlap Design  

作　　者：Kun Luo Kui Gong Jiangchai Chen Shengli Zhang Yongliang Li Huaxiang Yin Zhenhua Wu 

机构地区：[1]Key Laboratory of Microelectronics Device and Integrated Technology,Institute of Microelectronics of Chinese Academy of Sciences,Beijing 100029,China [2]IMECAS-MU-HZW joint computing laboratory of Integrated Circuits,Beijing 100029,China [3]MIIT Key Laboratory of Advanced Display Materials and Devices,School of Materials Science and Engineering,Nanjing University of Science and Technology,Nanjing 210094,China.

出　　处：《Journal of Microelectronic Manufacturing》2020年第4期32-39,共8页微电子制造学报（英文）

基　　金：the Training Program of the Major Research Plan of the National Natural Science Foundation of China(61774168,91964103)and the MOST(2016YFA0202300).

摘　　要：The electronic properties and transport properties of MoTe2/SnS2 heterostructure Tunneling FETs are investigated by the density functional theory coupled with non-equilibrium Green’s function method.Two dimensional(2D)monolayer MoTe2 and SnS2 are combined to a vertical van der Waals heterojunction.A small staggered band gap is formed in the overlap region,while larger gaps remain in the underlap source and drain regions of monolayer MoTe2 and SnS2 respectively.Such a type-II heterojunction is favorable for tunneling FET.Furthermore,we suggest short stack length and large gate-to-drain overlap to enhance the on-state current suppress the leakage current respectively.The numerical results show that at a low drain to source voltage Vds=0.05V,On/Off current ratio can reach 108 and the On-state currents is over 20μA/μm for ntype devices.Our results present that van der Waals heterostructure TFETs can be potential candidate as next generation ultra-steep subthreshold and low-power electronic applications.

关 键 词：2D materials heterojunction tunnel-FET gate-to-drain overlap DFT-NEGF. 

分 类 号：TB3[一般工业技术—材料科学与工程]