基于忆阻器的多路复用器设计与实现  被引量:2

Design and implementation of multiplexer based on memristor

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作  者:姚廉 刘鹏 武继刚[1] YAO Lian;LIU Peng;WU Jigang(School of Computers,Guangdong Universty of Technology,Guangzhou 510006,China)

机构地区:[1]广东工业大学计算机学院,广州510006

出  处:《扬州大学学报(自然科学版)》2021年第1期57-61,67,共6页Journal of Yangzhou University:Natural Science Edition

基  金:国家自然科学基金资助项目(62072118);广东省基础与应用基础研究基金资助项目(2019A1515110284);计算机体系结构国家重点实验室开放课题(CARCH201907)。

摘  要:结合忆阻器蕴含逻辑和非蕴含逻辑的运算特点,设计2-1和4-1多路复用器电路并提出其实现方法.利用蕴含逻辑和非蕴含逻辑自带"或"和"与"运算的特性,对多路复用器的逻辑表达式进行等价变换,运用2种逻辑的迭代运算实现2-1和4-1多路复用器.同时,通过调整逻辑执行的顺序提高忆阻器单元的复用率和精简操作流程.HSPICE仿真实验验证了该方法是可行的,且在减少忆阻器开销的同时能降低时延.Combining the operational characteristics of material implication logic(IMPLY)and not-material implication logic(N-IMPLY),this paper proposes a novel and efficient method for the implementation of 2-1 and 4-1 multiplexers.By this method,the logic expression of multiplexers is equivalently transformed by utilizing the characteristic of OR operation and AND operation of IMPLY and N-IMPLY logics.The 2-1 and the 4-1 multiplexers are implemented by iterative operations of the two logics.Moreover,the proposed method improves the reusability of the memristor cells by adjusting the sequence of logic execution,while the procedure of operations is also simplified.The feasibility of the designed multiplexers is verified by HSPICE simulations.Both the delay and area overhead performance of the proposed method are improved.

关 键 词:忆阻器 蕴含逻辑 非蕴含逻辑 多路复用器 

分 类 号:TP331.1[自动化与计算机技术—计算机系统结构]

 

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