一种降低频率合成器相位噪声的高增益电荷泵  

A High Gain Charge Pump for Reducing Phase Noise of Frequency Synthesizers

作　　者：翟奇国 魏鲁 袁昊煜 Zhai Qiguo;Wei Lu;Yuan Haoyu(Chengdu CORPRO Technology Co.,Ltd.,Chengdu 610041,China)

机构地区：[1]成都振芯科技股份有限公司,成都610041

出　　处：《半导体技术》2021年第6期445-450,共6页Semiconductor Technology

摘　　要：设计了一款低噪声高增益电荷泵,主要用于低相位噪声的频率合成器。在传统的电流转向型电荷泵结构中增加了非镜像结构的低噪声电流源单元,使电荷泵的输出电流呈比例增加,降低电荷泵对频率合成器输出相位噪声的贡献,以进一步降低频率合成器的相位噪声。采用0.18μm SiGe BiCMOS工艺进行了设计仿真和流片验证。测试结果表明:频率合成器工作在频率为10 GHz时,电荷泵中高增益低噪声电流源关闭和开启情况下,锁相环相位噪声分别为-106.1 dBc/Hz@10 kHz和-108.68 dBc/Hz@10 kHz。实现了通过开启电荷泵中高增益低噪声电流源使锁相环输出相位噪声下降约3 dB的目标。A low noise and high gain charge pump mainly used for frequency synthesizers with low phase noise was designed.In the conventional current steering charge pump structure,a low noise current source unit with non-mirror structure was added to increase the output current of the charge pump proportionally,and the contribution of the charge pump to the output phase noise of the frequency synthesizer was reduced,so as to further reduce the phase noise of the frequency synthesizer.The 0.18μm SiGe BiCMOS process was used for design simulation,chip fabrication and verification.The test results demonstrate that at the working frequency of the frequency synthesizer of 10 GHz,the phase noise of the phase-locked loop is-106.1 dBc/Hz@10 kHz and-108.68 dBc/Hz@10 kHz respectively when the high gain low noise current source in the charge pump is off and on.Hence,the design achieves the goal of reducing the output phase noise of the phase-locked loop by about 3 dB by turning on the low noise current source in the charge pump.

关 键 词：低相位噪声 电荷泵 频率合成器 锁相环(PLL) SiGe BiCMOS工艺 

分 类 号：TN433[电子电信—微电子学与固体电子学]