Graph processing and machine learning architectures with emerging memory technologies:a survey  

作　　者：Xuehai QIAN 

机构地区：[1]Ming Hsieh Department of Electrical and Computer Engineering,University of Southern California,Los Angeles 90089,USA

出　　处：《Science China(Information Sciences)》2021年第6期1-25,共25页中国科学（信息科学）（英文版）

摘　　要：This paper surveys domain-specific architectures(DSAs)built from two emerging memory technologies.Hybrid memory cube(HMC)and high bandwidth memory(HBM)can reduce data movement between memory and computation by placing computing logic inside memory dies.On the other hand,the emerging non-volatile memory,metal-oxide resistive random access memory(ReRAM)has been considered as a promising candidate for future memory architecture due to its high density,fast read access and low leakage power.The key feature is ReRAM’s capability to perform the inherently parallel in-situ matrixvector multiplication in the analog domain.We focus on the DSAs for two important applications—graph processing and machine learning acceleration.Based on the understanding of the recent architectures and our research experience,we also discuss several potential research directions.

关 键 词：graph processing machine learning acceleration RERAM HMC/HBM 

分 类 号：TP181[自动化与计算机技术—控制理论与控制工程] TP391.41[自动化与计算机技术—控制科学与工程]