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作 者:马鹏[1] 刘佩[1] 张伟[1] MA Peng;LIU Pei;ZHANG Wei(East China Institute of Computing Technology,Shanghai 201808,China)
出 处:《计算机系统应用》2021年第7期57-69,共13页Computer Systems & Applications
摘 要:根据摩尔定律的发展规律,集成电路的规模越来越大,单颗芯片可集成的电路越来越复杂.在一个SoC芯片的研发周期中,前仿验证工作随着芯片功能复杂程度验证难度增加,导致前仿验证时间不可控,如何在有限时间内可靠的、高效地完成复杂芯片验证工作是目前面对的问题.针对这一问题,本文定制一个基于UVM方法学的AMBA总线接口通用验证平台,该平台结构具有可扩展性、验证激励具有随机性、验证结果具有可靠性,能够支持AMBA-APB、AMBA-AHB、AMBA-AXI接口类型的待测模块的验证工作.针对目标可以快速地搭建验证平台,减少前仿验证的准备工作,UVM平台能够产生带约束随机数据,验证结果汇成覆盖率报告,能够保障验证工作的高效以及完备性.According to the Moore’s Law,the scale of integrated circuits is getting bigger,and the integratable circuits within a single chip are increasingly complex.In a research and development cycle of an SoC chip,pre-layout verification becomes harder with more complex chip functions,taking uncontrollable time.How to reliably and efficiently verify complex chips within limited time represents a challenge to be addressed.In response to this problem,this paper customizes a UVM-based universal verification platform for AMBA bus interface.The platform is equipped with a scalable structure and random verification incentives,achieving dependable results.It can verify the modules to be tested in AMBA-APB,AMBA-AHB,and AMBA-AXI interfaces.In addition,the verification platform can be quickly set up for the target,and the preparation for pre-layout verification is simplified.The UVM-based platform produces random data with constraints,and verification results are converted into coverage reports,ensuring the efficiency and completeness.
分 类 号:TN47[电子电信—微电子学与固体电子学]
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