基于g_(m)/I_(d)方法的Pipelined-SAR ADC高性能余量放大器设计  

Design of a High-Performance Residue Amplifier for Pipelined-SAR ADC Based on g_(m)/I_(d)Methodology

作　　者：饶晨光 肖瑞 桑庆华 邓红辉[1] RAO Chenguang;XIAO Rui;SANG Qinghua;DENG Honghui(Institute of Microelectronics Design,Hefei University of Technology,Hefei 230009,P.R.China)

机构地区：[1]合肥工业大学微电子设计研究所,合肥230009

出　　处：《微电子学》2021年第3期295-302,共8页Microelectronics

基　　金：国家自然科学基金资助项目(61704043);模拟集成电路国家重点实验室基金项目(6142802190506)。

摘　　要：基于g_(m)/I_(d)查找表方法,设计了一种用于14位100MS/s流水线逐次逼近寄存器模数转换器(Pipelined-SAR ADC)的余量放大器。该余量放大器采用高增益宽带宽的增益自举运算放大器(OTA)结构。该方法通过lookup函数查找器件直流工作点,克服了传统方法对短沟道器件参数无法准确设计的问题。通过迭代算法来选择核心器件的g_(m)/I_(d),使电路在满足性能要求的同时实现功耗的优化设计,且具有很好的工艺移植性。基于SMIC 55nm CMOS工艺,对设计的OTA性能进行了仿真验证,实现了在92dB直流增益、180MHz闭环-3dB带宽、1.44mVrms噪声等多维约束条件下电路功耗为1.9mW的最优化设计。Based on the g_(m)/I_(d)lookup table methodology,a residue amplifier for a 14-bit 100 MS/s pipelined successive approximation register analog-to-digital converter(Pipelined-SAR ADC)was designed.The residue amplifier used a high-gain and wide-bandwidth gain-boosted operational amplifier(OTA)structure.The methodology used a lookup function to find the DC operating point of the devices,which overcame the problem that the conventional method could not accurately design the parameters of the short channel devices.Through the iterative algorithm to select the g_(m)/I_(d) of the core devices,the circuit could achieve optimal design of power consumption while meeting the performance requirements,and had a nice process portability.The OTA performance of the design was simulated and verified in SMIC 55nm CMOS process.The optimized design of the circuit power consumption of 1.9mW under the multi-dimensional constraints such as a DC gain of 92dB,a closedloop-3dB bandwidth of 180MHz and a noise(rms)of 1.44mV was realized.

关 键 词：g_(m)/I_(d)查找表 流水线逐次逼近寄存器模数转换器 增益自举运算放大器 最优化设计 

分 类 号：TN722.1[电子电信—电路与系统]