基于分类的预取感知缓存分区机制  

Classification-based Prefetch-aware cache partition mechanism

作　　者：陈玲玲 焦童 汪玲 安鑫[1] 李建华[1] CHEN Lingling;JIAO Tong;WANG Ling;AN Xin;LI Jianhua(School of Computer and Information,Hefei University of Technology,Hefei 230009,China;Anhui Vocational and Technical College,Hefei 230051,China)

机构地区：[1]合肥工业大学计算机与信息学院,合肥230009 [2]安徽交通职业技术学院,合肥230051

出　　处：《智能计算机与应用》2021年第6期20-25,共6页Intelligent Computer and Applications

基　　金：国家自然科学基金青年基金(61402145,61673156)。

摘　　要：在多核处理器中,硬件预取技术是解决存储墙问题的主要技术之一,是对高速缓冲寄存器的优化。但是现有的预取技术大多只考虑内存密集型程序的性能优化,而忽视了非内存密集型程序因预取而受到的干扰。针对这个问题,本文提出基于分类的预取感知缓存分区机制利用自适应预取控制和缓存分区技术,可以动态调整预取的激进程度和合理分配共享缓存,该机制使用Champsim进行仿真实验。实验结果表明该机制可以有效提高非内存密集型程序的吞吐量,减少核间干扰,提高系统的性能和公平性。In multi-core processor,hardware prefetching is one of the main technologies to solve the problem of memory wall,which is the optimization of cache registers.However,most of the existing prefetching techniques only consider the performance optimization of memory intensive programs,and ignore the interference of non memory intensive programs due to prefetching.To solve this problem,this paper proposes a Classification-based Prefetch-aware Cache Partition Mechanism.Using adaptive prefetcher control and cache partitioning technology,we can dynamically adjust the aggressiveness of prefetcher and reasonably allocate shared cache.The mechanism uses champsim for simulation experiments.Experimental results show that this mechanism can effectively improve the throughput of non memory intensive programs,reduce inter core interference,and improve the performance and fairness of the system.

关 键 词：高速缓冲寄存器 多核处理器 共享缓存 硬件预取 缓存分区 

分 类 号：TP39[自动化与计算机技术—计算机应用技术]