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作 者:曾素馨 肖时茂[1,3] ZENG Su-xin;XIAO Shi-mao(IntelliSense Research and Development Center, Institute of Microelectronics of the Chinese Academy of Sciences, Beijing 100029, China;School of Electronic,Electrical and Communication Engineering,University of Chinese Academy of Sciences,Beijing 100049, China;Nanjing Zhongke Microelectronics Co.,Ltd., Nanjing 210018, China)
机构地区:[1]中国科学院微电子研究所智能感知研发中心,北京100029 [2]中国科学院大学电子电气与通信工程学院,北京100049 [3]南京中科微电子有限公司,南京210018
出 处:《科学技术与工程》2021年第21期8939-8943,共5页Science Technology and Engineering
摘 要:早期近距离无线通信技术(near field communication,NFC)标准规定13.56 MHz无线通信卡的数据速率最高到848 Kbps,在智能手机NFC技术广泛应用的背景下,通信要求达到超高数据速率(very high bit rate,VHBR)。近场通信卡(proximity integrated circuit card,PICC)接收电路数据速率提升的难点主要在于移幅键控法/移频键控法(amplitude-shift keying/phase-shift keying,ASK/PSK)接收器的设计,其在实际应用中受码间串扰(inter-symbol interference,ISI)、功耗、电路复杂度等限制。针对以上问题,提出一种完整的低功耗PICC解调解码电路设计,包含高定时精度的全数字定时恢复电路。设计实现采用标准0.18μm互补金属氧化物半导体(complementary metal oxide semiconductor,CMOS)工艺,实现了147 pJ/bit的能效,可应用于ASK 0.106~3.39 Mbps数据速率通信。The early near field communication(NFC)standard specified a 13.56 MHz wireless communication proximity integrated circuit card(PICC)with a data rate up to 848 Kbps,in the background of the widespread application of smart phone NFC technology,the higher data rate is required.The difficulty in improving the data rate of PICC lies in the design of amplitude-shift keying/phase-shift keying(ASK/PSK)receiver.It is limited by inter-symbol interface(ISI),power consumption,circuit complexity and so on in practical applications.Aimed at the above problems,a complete design of low power demodulation decoding circuit was proposed,including an all digital timing recovery circuit with high timing accuracy.Implementation of the design adopts standard 0.18μm complementary metal oxide semiconductor(CMOS)technology,the energy efficiency achieved 147 pJ/bit,and can be applied to 0.106~3.39 Mbps ASK communication.
关 键 词:移幅键控法(ASK) 近场通信卡(PICC)接收器 超高数据速率(VHBR) 全数字定时恢复电路
分 类 号:TN914[电子电信—通信与信息系统]
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