AM5706通过VIP接口与FPGA图像数据传输实现  

Method of Image Data Transmission betweenAM5706 and FPGA through VIP Interface

作　　者：张海堂 ZHANG Hai-tang(Intellicash Equipment Co.,Ltd.,Guangzhou 510663,Guangdong)

机构地区：[1]广州中智融通金融科技有限公司,广东广州510663

出　　处：《电脑与电信》2021年第6期72-75,共4页Computer & Telecommunication

摘　　要：介绍了一种AM5706通过VIP接口与FPGA图像数据传输的实现方法,该方法是票据图像扫描模块的一个关键技术,票据图像扫描模块可采集两级CIS图像传感器信号,经模数转换后送入FPGA进行灰度值补偿预处理,FPGA积累完整一行图像数据后,输出到AM5706的VIP接口。AM5706 VIP设备每接收到一幅完整的图像数据,才会触发一次CPU中断,相比传统EMIF并行总线+EMDA方法的每次只能接收一行图像数据,采用VIP接口传输图像数据可极大减少CPU中断次数、降低CPU资源使用率,这对提升系统性能和降低硬件成本都具有重要意义。This paper introduces a method of image data transmission between AM5706 and FPGA through VIP(Video Input Port)interface.This method is a key technology of bill image scanning module.Bill image scanning module can collect two CIS image sensor signals,which are sent to FPGA for gray value compensation preprocessing after analog-to-digital conversion.FPGA accumulates a complete line of image data and outputs it to VIP interface of AM5706.Each time AM5706 VIP device receives a full image data,it will trigger a CPU interrupt.Compared with the traditional EMIF parallel bus+EMDA method,of which can only receive one line of image data at a time,using VIP interface can greatly reduce the CPU interrupt frequency and CPU resource utilization,which is of great significance to improve the system performance and reduce the hardware cost.

关 键 词：AM5706 FPGA CIS VIP接口 票据扫描 

分 类 号：TN919.8[电子电信—通信与信息系统] TN791[电子电信—信息与通信工程]