FPGA软核的CAN总线接口设计及星载应用  

Design and Application of CAN Bus Interface Based on FPGA Soft Core

作　　者：钱小东 宣浩[1,2] 曾巧 葛鹏 Qian Xiaodong;Xuan Hao;Zeng Qiao;Ge Peng(The 38th Research Institute of China Electronics Technology Group Corporation,Hefei 230088;Key Laboratory of Aperture Array and Space Application)

机构地区：[1]中国电子科技集团公司第三十八研究所,合肥230088 [2]孔径阵列与空间探测安徽省重点实验室

出　　处：《单片机与嵌入式系统应用》2021年第9期18-22,共5页Microcontrollers & Embedded Systems

摘　　要：本文基于国产FPGA和CPU综合电子系统,提出了一种星载CAN总线通信接口方案,首先介绍了星载CAN总线接口的总体设计,采用CPU实现应用层软件设计,FPGA实现CAN控制器,外加CAN驱动器的架构,接着详细描述了FPGA端的总线接口逻辑和CPU端的应用程序流程,最后借助于CANScope总线综合分析仪验证表明CAN通信系统功能完备、性能良好。目前已在某星载商业航天项目中稳定运行。Based on the domestic FPGA and CPU integrated electronic system,a satellite CAN bus communication interface scheme is proposed.Firstly,the overall design of the satellite CAN bus interface is introduced.The CPU is used to implement the application layer software design,and the FPGA implements the CAN controller,with CAN driver is used to realize the total architecture.Then,the FPGA-side bus interface logic and the CPU-side application program flow are described in detail.Finally,the CANScope bus comprehensive analyzer is used to verify that the CAN communication system has complete functions and good performance.The design has been running stably in a commercial space project.

关 键 词：CAN总线 BQR5VSX95T BM3823 SAR 

分 类 号：TP336[自动化与计算机技术—计算机系统结构]