一种基于FPGA的4K HDMI转eDP视频接口的设计  

A Design of 4K HDMI to eDP Video Interface based on FPGA

作　　者：谢绪煜 龙彬 周军 胡彬 XIE Xuyu;LONG Bin;ZHOU Jun;HU bin(Changsha Xiangji Haidun Technology Co.,Ltd.,ChangSha 410100,China)

机构地区：[1]长沙湘计海盾科技有限公司,湖南长沙410100

出　　处：《电视技术》2021年第7期16-20,共5页Video Engineering

摘　　要：现场可编程逻辑门阵列(Field Programmable Gate Array,FPGA)技术以其可靠性高、速度快及设计灵活等特点广泛应用于图像处理领域。目前在民用领域,液晶显示器厂商常用的驱动4K eDP接口液晶面板的方案,主要是基于晨星MSTAR或者Realtek、国内海思及瑞芯微等图像处理芯片设计的,而该方案灵活性较低,如需要增加新的视频图像接口或者改变某一项图像处理功能较为困难。针对上述情况,介绍一种基于FPGA将4K HDMI视频信号转为eDP接口信号的方法,利用高速的FPGA将1路分辨率为3840*2160的4K图像信号经过视频缩放模块存入DDR3中,通过eDP接口发送到高清4K显示器进行视频图像显示。详细介绍HDMI数据处理硬件电路,并介绍基于FPGA的双线性插值算法、DDR3高速接口设计及HDMI接口程序和eDP接口设计流程,最后通过试验验证设计的正确性。Field Programmable Gate Array(FPGA)technology is widely used in the field of image processing because of its high reliability,fast speed and flexible design..At present,LCD manufacturers in the civilian field commonly drive 4K eDP interface LCD panels,mainly using image processing chips based on MSTAR or Realtek,domestic HiSilicon and Rockchip.However,the flexibility of using this solution is low,such as it is difficult to add a new video image interface or change a certain image processing function.In view of the above situation,this system introduces a method based on FPGA to convert 4K HDMI video signal to eDP interface signal interface,using high-speed FPGA to store 1 channel of 4K image signal with a resolution of 3840*2160 through the video scaling module DDR3,and send to the high-definition 4K display through the eDP interface for image and video display.This article introduces the HDMI data processing hardware circuit in detail,and introduces the FPGA-based bilinear interpolation algorithm,DDR3 highspeed interface design,HDMI interface program and eDP interface design flow,and finally verifies the correctness of the design through experiments.

关 键 词：4K高清 HDMI EDP DDR3 

分 类 号：TP334.7[自动化与计算机技术—计算机系统结构]