面向新一代众核处理器的高性能SNC的设计与验证  

Design and Verification of High Performance SNC for New Generation Multi-core Processor

作　　者：徐海文 张洋[1] XU Haiwen;ZHANG Yang(School of Computer Science,National University of Defense Technology,Changsha 410073)

机构地区：[1]国防科技大学计算机学院,长沙410073

出　　处：《计算机与数字工程》2021年第8期1707-1713,共7页Computer & Digital Engineering

摘　　要：先进可扩展接口(AXI)是ARM公司推出的应用于高频系统的通道型总线,广泛应用于各种高性能SoC设计中。当前,通用处理器的主流是多核处理器,而多核处理器的主流是“通用DSP内核+应用专用核心”的异构融合结构。应用专用核心分为两种结构:同构多核和异构多核。在同构多核结构中,随着核数的增加,逐渐采用超节点结构,即在处理器中,几个内核构成一个超级节点,通过超级节点控制器实现片上网络与DSP内核之间的数据交互。在这项工作中,论文基于AXI总线,为新一代多核处理器设计了一种高性能、高带宽、低延迟的超级节点控制器。该超级节点控制器设计具有单独的读写数据通道,使用双向VALID和READY信号来实现握手机制,支持不对齐的数据传输、burst数据传输、广播操作、并支持乱序交易等。验证和综合结果表明,该超级节点控制器可以正确实现DSP内核与片上网络之间的数据交互,性能满足设计要求。The Advanced eXtensible Interface is a channel type bus introduced by ARM for high-frequency systems and it is widely used in various high-performance SoC designs.At present,the mainstream of general-purpose processors is the multi-core processor,and the mainstream of multi-core processor is a heterogeneous fusion structure of"general-purpose DSP core+application-specific core".The application-specific core is divided into two structures,which are isomorphic multi-core and heterogeneous multi-core.In the isomorphic multi-core structure,as the number of cores increases,super-node structure is gradually adopted.In the processor,several cores form a super node and the super node controller implements data interaction between the on-chip network and the DSP cores.In this work,a high-performance,high-bandwidth,low-latency super node controller is designed for next-generation multi-core processors based on AXI bus.This super node controller is designed with separate read and write data channels.It uses a two-way VALID and READY signal to implement a handshake mechanism.It supports unaligned data transmission,burst data transmission,broadcast operations and out-of-order transactions.The verification and synthesis results show that the super node controller can correctly implement the data interaction between the DSP core and the on-chip network,and the performance meets the design requirements.

关 键 词：AXI总线 Burst数据 超节点控制器 数据广播 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]