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作 者:徐江涛 徐爽 Xu Jiangtao;Xu Shuang(Tianjin Key laboratory of Imaging and Sensing Microelectronic Technology,School of Microelectronics,Tianjin University,Tianjin 300072,China)
机构地区:[1]天津大学微电子学院,天津市成像与感知微电子技术重点实验室,天津300072
出 处:《南开大学学报(自然科学版)》2021年第4期58-61,共4页Acta Scientiarum Naturalium Universitatis Nankaiensis
基 金:国家自然科学基金(61774110)。
摘 要:提出并仿真验证了一种用于互补金属半导体氧化物图像传感器的10位数字相关双采样列级两步单斜模数转换器.数字相关双采样通过减法器实现,使像素复位信号与像素曝光信号的量化结果在数字域作差,降低了列级读出电路中非理想因素的影响;比较器采用基尔伯特单元,避免了传统两步单斜ADC中因记忆电容的使用所导致的时钟馈通和斜坡斜率误差的问题.通过在Matlab中建模仿真验证,ADC的信噪失真比为61.4 dB,有效位为9.9 bit,量化周期为140个时钟周期.与传统10位数字相关双采样单斜ADC相比,可节省2170个时钟周期,同时其平均FPN较传统两步单斜结构可以降低0.81 LSB.A 10 bit digital correlated double sampling two-step single-slope analog to digital converter(ADC)for complementary metal oxide semiconductor(CMOS)image sensor was proposed and simulated.Digital correlated double sampling technology was implanted by the subtractor,and it reduced the influence of non-ideal factors in column level readout circuit by making quantization result of pixel reset signal and pixel exposure signal in digital domain;the comparator was implanted by a Gilbert cell to avoid the problem of clock feedthrough and ramp error caused by the use of memory capacitance in the traditional two step single-slope ADC.The simulated results in matlab shows:the SNR of ADC is 61.4 dB,the effective bit is 9.9 bit and one quantization period are 140 clocks.Comparing with the traditional 10 bit singleslope ADC,2170 clocks is saved and 0.81 least significant bit(LSB)is reduced.
关 键 词:CMOS图像传感器 数字相关双采样 两步单斜ADC
分 类 号:TN47[电子电信—微电子学与固体电子学]
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