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作 者:洪怡雯 陈伯文[1,2] 王强 汤苏雷[4] HONG Yiwen;CHEN Bowen;WANG Qiang;TANG Sulei(School of Electronic and Information Engineering,Soochow University,Suzhou Jiangsu 215006,China;Suzhou LZY Technology Co.,Ltd.,Suzhou Jiangsu 215153,China;Applied Technology College,Soochow University,Suzhou Jiangsu 215325,China;ASUS Technology PTE Limited,Suzhou Jiangsu 215011,China)
机构地区:[1]苏州大学电子信息学院,江苏苏州215006 [2]苏州路之遥科技股份有限公司,江苏苏州215153 [3]苏州大学应用技术学院,江苏苏州215325 [4]华硕科技苏州有限公司,江苏苏州215011
出 处:《电源技术》2021年第9期1209-1212,1226,共5页Chinese Journal of Power Sources
基 金:国家自然科学基金(61701332);江苏省自然科学基金优秀青年项目(BK20200099);中国博士后科学基金(2020T130460,2020M671598);江苏省博士后科学基金(2020Z109)。
摘 要:设计了以UP1542为电源转换芯片的电压模式Buck电路,提出了一种基于Type Ⅲ型环路补偿中零极点理论的优化方法,引入无补偿时电压模式Buck电路与传统电压模式Buck电路Type Ⅲ型环路补偿方法进行比较。试验测试结果表明:所提优化方法与Buck电路无补偿方法和传统电压模式Buck电路Type Ⅲ环路补偿理论设计方法相比,输出电压超调分别下降33.6%和14.9%,动态响应速度分别提升72.6%和24%,同时保证了品质因素Q附近频率的电路稳定性。该优化方法降低了动态响应误差,同时有效地减小了输出电压动态响应时间,达到了提高电路稳定性的目的,验证了该优化方法的有效性。A voltage mode Buck circuit was designed with UP1542 as the power conversion chip,an optimization method based on the zero-pole theory in Type Ⅲ loop compensation was proposed,and the uncompensated voltage mode Buck circuit and traditional voltage mode Buck circuit with Type Ⅲ loop compensation method were introduced to compare.The test results show that,compared with the uncompensated Buck circuit design method and the traditional voltage mode Buck circuit with Type Ⅲ loop compensation method,the optimized method reduces the output voltage overshoot by 33.6%and 14.9%,increases the dynamic response speed by 72.6%and 24%,and guarantees the stability of circuit at frequencies near the quality factor Q.The optimization method reduces the dynamic response error while effectively reduces the output voltage dynamic response time,and achieves the purpose of improving circuit stability.The effectiveness of the optimization method was verified.
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