七人表决逻辑电路的设计与实现  

作　　者：孙宇舸[1] 叶柠[1] 李景宏[1] 

机构地区：[1]东北大学信息科学与工程学院,辽宁沈阳110819

出　　处：《科技创新与应用》2021年第28期87-89,92,共4页Technology Innovation and Application

摘　　要：在表决逻辑电路的设计与研究中,比较常见的是三人表决逻辑电路,超过五人的表决逻辑电路的设计由于其变量较多,逻辑函数化简困难、电路结构复杂等问题导致研究较少。文章以七人表决逻辑电路的设计为例,分析了电路的逻辑关系,提出了七变量表决逻辑的卡诺图化简方法,将原本复杂的七变量卡诺图分解为4个四变量卡诺图,实现化繁为简,从而得出七人表决逻辑的逻辑函数表达式,并通过引入数据选择器进一步简化电路,实现了基于数据选择器的七人表决逻辑电路,文章的设计思想可以推广到更多变量的表决逻辑电路的设计。In the research of majority voter logic circuit design,the 3-modular majority voting system is the most widely used.The design of the over 5-modular majority voting system is rarely discussed due to its multiple inputs,the complexity of function simplification and circuit structure.This paper explores the 7-modular majority voting system design,analyzes the logic relationship of voter circuit and proposes a Karnaugh map simplification method for the 7-modular voting logic by decomposing the original seven-variable Karnaugh map into four four-variable Karnaugh maps to obtain the logic function expression of the 7-modular majority voting logic circuit.The 7-modular majority voter logic circuit based on Multiplexer is realized.The method herein can also be applied to the design of multiple variable majority voter.

关 键 词：七人表决逻辑 卡诺图 数据选择器 

分 类 号：TN791-4[电子电信—电路与系统]