基于0.13μm SiGe BJT工艺的25 GHz超宽带采样/保持电路  

A 25 GHz Ultra-Wideband S/H Circuit Based on 0.13 μm SiGe BJT Process

作　　者：杨潇雨 王永禄[2,3] 孙伟 YANG Xiaoyu;WANG Yonglu;SUN Wei(College of Optoelec.Engineer.,Chongqing Univ.of Posts and Telecommun,Chongqing 400065,P.R.China;Science and Technology on Analog Integrated Circuit Laboratory,Chongqing 400060,P.R.China;The 24th Research Institute of China Electronics Technology Corporation,Chongqing 400060,P.R.China)

机构地区：[1]重庆邮电大学光电工程学院,重庆400065 [2]模拟集成电路国家重点实验室,重庆400060 [3]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《微电子学》2021年第4期461-465,共5页Microelectronics

基　　金：模拟集成电路国家重点实验室基金资助项目(6142802180101)。

摘　　要：提出了一种基于0.13μm SiGe BJT工艺的超宽带采样/保持电路。采用辅助开关电路,优先对信号进行提前处理,提高了电路的线性度。采用全差分开环结构和多级级联输出缓冲器,有效减少了下垂率。在5 V电源电压和100 fF负载电容下,采用Cadence Spectre进行仿真分析。结果表明,在相干采样下,时钟频率为4 GHz;在高频18 GHz下,无杂散动态范围(SFDR)达63.99 dB,高频特性好。该电路的带宽达到25.1 GHz,适用于高速A/D转换器。An ultra-wideband sampling/holding circuit was designed in a 0.13 μm SiGe BJT process. The auxiliary switching circuit was used to process the signal in advance, which improved the linearity of the circuit. The fully differential open loop structure and multi-stage cascade output buffer were adopted to reduce the sagging rate effectively. The simulation was performed by Cadence Spectre at 5 V supply voltage and 100 fF load capacitance. The results showed that the clock frequency was 4 GHz under coherent sampling. At high frequency of 18 GHz, the SFDR reached 63.99 dB, so the high frequency characteristics was good. The bandwidth of the circuit was up to 25.1 GHz. It was suitable for high speed A/D converters.

关 键 词：采样/保持电路 宽带 辅助开关 SiGe BJT工艺 

分 类 号：TN792[电子电信—电路与系统] TN431