基于极化码的分布式信源编解码系统的FPGA设计与实现  

Design and implementation on FPGA of distributed source coding system based on polar codes

作　　者：周峻辉 杨红[1] 卿粼波[1] 吴晓红[1] 赵祥伟 Zhou Junhui;Yang Hong;Qing Linbo;Wu Xiaohong;Zhao Xiangwei(School of Electronics and Information Engineering,Sichuan University,Chengdu 610065,China)

机构地区：[1]四川大学电子信息学院,四川成都610065

出　　处：《信息技术与网络安全》2021年第10期61-66,共6页Information Technology and Network Security

基　　金：四川省科技计划项目(2018HH0143)。

摘　　要：为解决在终端资源受限的场景下难以进行压缩编码的问题,在FPGA平台上设计了一种基于极化码的分布式信源编解码系统。系统在反馈机制下通过删除部分极化码校验比特实现了码率自适应传输。最后采用Verilog硬件描述语言在Xilinx公司的Virtex-7系列开发板上进行硬件设计及系统实现。测试结果表明,采用时钟频率为200 MHz的情况下,系统的吞吐率可达到919 kb/s。To solve the problem that it is hard to do compression coding in the situation that the resources are constrained at the terminal devices,a distributed source coding system based on polar codes is designed on FPGA.The system realizes the rate-adaption tranmission by puncturing some check bits under the feedback scheme.Finally,this system is designed by Verilog hardware description language and carried out on Xilinx Virtex-7 evaluation platform.The test results show that the throughput of the system can reach 919 kb/s when the clock frequency is 200 MHz.

关 键 词：分布式信源编解码 极化码 FPGA 

分 类 号：TN911.2[电子电信—通信与信息系统]