基于FPGA的四象限探测器信号处理板设计  

A design of signal processing board for the four quadrant detector based on FPGA

作　　者：田静 马伟[1] 卢晓东[2] TIAN Jing;MA Wei;LU Xiao-dong(Xinhua College of Ningxia University,Yinchuan 750021,China;Institute of Precision Guidance and Control,School of Astronautics,Northwestern Polytechnical University,Xi'an 710072,China)

机构地区：[1]宁夏大学新华学院,宁夏银川750021 [2]西北工业大学航天学院精确制导与控制研究所,陕西西安710072

出　　处：《激光与红外》2021年第9期1231-1237,共7页Laser & Infrared

基　　金：2020年度宁夏高等学校科学研究项目(No.NGY2020100)资助。

摘　　要：针对激光半主动导引头四象限探测器对回波窄脉冲信号高精度同步采样需求,设计了一款基于FPGA的四象限探测器信号处理板。该设计主要包括峰值检测模块、触发模块和FPGA模块。探测器前端板输出信号经峰值检测模块自动获取峰值电压后,由ADC实现模数变换,在FPGA内进行目标位置解算并形成制导指令上传至飞控板。其核心设计峰值检测模块,解决了窄脉冲信号峰值捕获的难题。实验表明,该设计输出波形稳定,且输出与输入具有良好的线性关系,最大相对误差小于4%,通道一致性高于98%,满足四象限探测器读出需求;与现有两款峰值检测模块进行性能对比,表明该设计性能表现良好。This study designs a signal processing board for the four quadrant detector based on FPGA chip,to enable high precision synchronous sampling of echo narrow pulse signals through the four quadrant detector of laser semi active seeker.The design mainly consists of peak detector,trigger module and FPGA.The peak of the signal from the front end board for the detector is automatically captured by the peak detector,followed by AD conversion and deciphering the target position via FPGA.The control instructions created by the FPGA are then sent to flight controller.The core design of the peak detector,addresses the hard problem of capturing the peak of narrow pulse signals.Experimental results show the design is capable to output stable waveform,the output signal presents highly linear relationship to the input with a maximum relative deviation<4%and the inter channel consistency is higher than 98%,suggesting the design meets the readout demands of the four quadrant detector.Compared with existing two peak detectors,the design performs acceptably well.

关 键 词：激光导引头 四象限探测器 峰值检测 FPGA 

分 类 号：TJ765[兵器科学与技术—武器系统与运用工程]