密码SoC中算法IP核通用接口模型  

General interface model of algorithm IP core in crypto SoC

作　　者：王凯[1] 李伟[1] 陈韬[1] 南龙梅 WANG Kai;LI Wei;CHEN Tao;NAN Long-mei(Key Laboratory of Information Security,Information Engineering University,Zhengzhou 450001,China;Department of Microelectronics,Fudan University,Shanghai 200433,China)

机构地区：[1]信息工程大学信息安全重点实验室,河南郑州450001 [2]复旦大学微电子学院,上海200433

出　　处：《计算机工程与设计》2021年第10期2799-2807,共9页Computer Engineering and Design

基　　金：国家自然科学基金项目(61404175)。

摘　　要：针对不同类型密码算法的调度控制需求,提出一种通用数据包和数据通信协议,支持多样化密码运算下的接口适配;提出一种可编程电路结构,高效完成数据包解析和协议转换;提出一种专用DMA结构,快速实现算法IP核与片上存储间的数据传输。实验结果表明,该通用接口模型在CMOS 55 nm工艺下,时钟频率可达926 MHz,面积最小为28208μm^(2),将AES、SM4、SNOW、ZUC、SHA3、SM3和RSA算法的数据吞吐率分别提高266%、258%、232%、239%、116%、117%和64%。Aiming at the scheduling control requirements of different cryptographic algorithms,a general data packet and data communication protocol was proposed,which supported interface adaptation under various cryptographic operations.A programmable circuit structure was proposed,which efficiently completed the packet analysis and protocol conversion.A special DMA structure was proposed to realize the data transmission between IP core and on-chip storage.Experimental results show that the clock frequency can reach 926 MHz and the minimum area is 28208μm^(2) in CMOS 55 nm process.The data throughput of AES,SM4,SNOW,ZUC,SHA3,SM3 and RSA algorithms are increased by 266%,258%,232%,239%,116%,117%and 64%,respectively.

关 键 词：数据通信协议 可编程电路结构 专用DMA 通用接口模型 统一管理 高效调度 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]