高速大容量DDR微系统过孔串扰研究  

Research on via crosstalk in high speed and large capacity DDR microsystems

作　　者：张景辉 曾燕萍 王梦雅 周倩蓉 闫传荣 Zhang Jinghui;Zeng Yanping;Wang Mengya;Zhou Qianrong;Yan Chuanrong(China Electronics Technology Group Corporation No.58 Research Institute,Wuxi 214072,China)

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214072

出　　处：《电子技术应用》2021年第11期100-104,共5页Application of Electronic Technique

摘　　要：随着高速数字微系统中DDR总线信号传输速率与系统集成度的不断提高,过孔串扰问题成为影响系统信号完整性的不可忽视的因素之一。基于电磁耦合理论,通过建模仿真方法量化分析了过孔串扰的主要影响因素以及串扰噪声对信号质量的影响,在此基础上提出了过孔设计的主要原则以及减小串扰噪声的优化设计方法;介绍了一种正反面腔体结构系统级封装的信号处理微系统基板,结合JEDEC标准对DDR3总线进行了仿真分析与评估,通过以上方法优化过孔串扰大大改善了DDR总线的信号完整性,验证了该方法的正确性与有效性。With the rapid increase of signal transmission rate and integration in high speed and large capacity digital microsystems,the influence of via crosstalk on signal integrity is becoming more and more prominent.Based on electromagnetic coupling theory,factors on via crosstalk and the influence of crosstalk noise on signal integrity are simulated and analyzed quantitatively by establishing simulation models.And some principles of via design and measures to decrease crosstalk noise are proposed.DDR3 bus in a microsystem in SiP(System in Package)technology,in which DDR units are mounted on both faces,is simulated and analyzed based on JEDEC DDR3 standard.Signal integrity of DDR bus is improved distinctly by reducing via crosstalk in a proper and effective measure proposed in this paper.

关 键 词：过孔串扰 微系统 DDR 信号完整性 

分 类 号：TN405.97[电子电信—微电子学与固体电子学]