Buck芯片缓冲电路设计的仿真分析与应用  

Simulation analysis and application of buck chip buffer circuit design

作　　者：叶丰华[1] 刘昊 康磊 蔡文波 Ye Fenghua;Liu Hao;Kang Lei;Cai Wenbo(State Key Laboratory of Inspur High Efficiency Server and Storage Technology,Inspur Electronic Information Industry Co.,Ltd.,Beijing 100086,China)

机构地区：[1]浪潮电子信息产业股份有限公司浪潮高效能服务器和存储技术国家重点实验室,北京100086

出　　处：《电子技术应用》2021年第10期113-117,123,共6页Application of Electronic Technique

基　　金：国家重点研发计划项目(2017YFB1001700)。

摘　　要：Buck型变换器的开关点是外部调优的主要对象,随着开关频率的提高和负载电流的增大,芯片内的寄生电感对开关电压波形的影响越来越大,外部缓冲电路作为调整开关波形的工具起到关键的作用,仅仅依靠经验来设计外部缓冲电路已经无法满足设计要求。通过对缓冲电路的工作原理进行分析,结合仿真结果和工程实践,分析缓冲电路的稳压性能和效率损失,可以为外围缓冲电路的设计提供一种量化分析方法。The switching point of the buck converter is the main object of external tuning.With the increase of the switching frequency and the increase of the load current,the parasitic inductance in the chip has an increasing influence on the switching voltage waveform,and the external buffer circuit is used as the adjustment switch.The waveform tool plays a key role,and only relying on experience to design the external buffer circuit can no longer meet the design requirements.By analyzing the working principle of the buffer circuit,combined with simulation results and engineering practice,this paper analyzes the voltage regulation performance and efficiency loss of the buffer circuit,and provides a quantitative analysis method for the design of the peripheral buffer circuit.

关 键 词：BUCK型变换器 仿真 缓冲电路 效率 

分 类 号：TN492[电子电信—微电子学与固体电子学]