SG-Long Rang SOC芯片中低功耗宽分频比分频器的设计与实现  

Design and Implementation of a Low Power and Wide Frequency Ratio Divider for SG-Long Rang SOC

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作  者:钟成 李静 龙强 李津 叶刘婷 ZHONG Cheng;LI Jing;LONG Qiang;LI Jin;YE Liuting(Xiong An Power Supply Company of Hebei province,State Grid,Xiongan,Hebei,071000,CHN;State Grid SLJIShenwang Location Based Service(Bejing)Co.LTD,Beijing,102211,CHN;School of Science and Technology Southeast University,Nanjing,210096,CHN)

机构地区:[1]国网河北省电力有限公司雄安供电公司,河北雄安071000 [2]国网思极神往位置服务(北京)有限公司研发中心,北京102211 [3]东南大学信息科学与工程学院,南京210096

出  处:《固体电子学研究与进展》2021年第5期382-387,共6页Research & Progress of SSE

基  金:国家电网“基于SG-Long Range的物联网入口通信关键技术研究及应用”(5204XQ20000A)。

摘  要:设计了一种应用于频率综合器的低功耗宽分频比分频器,该电路为国家电网SG-Long Rang无线传感网SOC芯片的频率合成器的关键组成部分。该分频器采用深亚微米BiCMOS工艺,包括第一级分频比可扩展的六级2/3双模分频器级联的可编程分频器;第二级8/9双模预分频器和7位脉冲吞咽计数器;第三级16/17双模预分频器和9位脉冲吞咽计数器。分频比设置范围从8~8703,可覆盖SG-Long Rang无线传感网200 MHz~3 GHz频段。A low power wide frequency ratio divider for frequency synthesizer was designed in this paper,which was a key component of the frequency synthesizer of the SOC chip of SG-Long Rang wireless sensing network for the national grid.Implemented by deep submicron Bi CMOS technology,the frequency divider includes a programmable divider with a scalable six-stage 2/3 dual-mode divider cascade for the first stage dividing ratio;a second stage 8/9 dual-mode prescaler and 7-bit pulse swallow counter;and a third stage 16/17 dual-mode prescaler and 9-bit pulse swallow counter.Frequency division ratio ranges from 8~8703,and it can be used in 200 MHz~3 GHz frequency synthesizer of SG-Long Rang SOC RF chip.

关 键 词:SG-Long Rang 分频器 宽分频比 可编程 频率综合器 

分 类 号:TN911[电子电信—通信与信息系统]

 

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