电源电压可变的性能可调Σ-Δ调制器设计  

Design of an Adjustable PerformanceΣ-ΔModulator with Variable Supply Voltage

作　　者：杜长青 卜刚[1] DU Changqing;BU Gang(College of Electronic Information Engineering,Nanjing University of Aeronautics and Astronautics,Nanjing210000,P.R.China)

机构地区：[1]南京航空航天大学电子信息工程学院,南京210000

出　　处：《微电子学》2021年第5期654-658,665,共6页Microelectronics

基　　金：江苏省自然科学基金资助项目(BK2012792)。

摘　　要：基于SMIC 0.18μm CMOS工艺,设计了一种应用于自适应系统的可重构2阶Σ-Δ调制器。引入动态电压调整技术,研究了不同输入信号下如何通过降低电源电压来节省ADC功耗。首先在Simulink下对非理想参数进行数学建模和分析,然后在Cadence下完成电路设计,并完成版图设计和后仿真。除了采用运放的差分对宽长比和尾电流等传统调整方案,本设计还可根据输入信号的幅度调整电源电压,进一步提高系统灵活性。仿真结果表明,在系统有效位数要求为12 bit时,使用3.3V电源电压供电的功耗为123μW,电压降为1.8V时功耗仅为51μW,通过降低电源电压节省功耗的效果明显。版图总面积为0.06mm^(2)。Based on the SMIC 0.18μm CMOS process,a reconfigurable second-orderΣ-Δmodulator was designed for the applications of adaptive systems.With the introduction of dynamic voltage scaling technique,how to reduce the power supply voltage to save ADC power consumption under different input signals had been studied.First,the effects of non-ideal parameters on system performance had been analyzed by mathematical modeling under Simulink,and then the circuit design had been conducted under Cadence,with the layout design and post-simulation completed.In addition to conventional adjustment schemed such as the op amp’s input differential pair width-tolength ratio and tail current,the power supply voltage could be adjusted according to the input signal amplitude to further improve the system flexibility.The simulation results showed that if the ENOB required by the system was 12bit,the modulator’s power consumption was reduced from 123μW to 51μW when the power supply voltage was decreased from 3.3Vto 1.8V,indicating a significant power saving effect.The area of the designed modulator’s layout was 0.06mm^(2).

关 键 词：自适应系统 可重构 2阶Σ-Δ调制器 动态电压调整 低功耗 

分 类 号：TN792[电子电信—电路与系统]