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作 者:张倩[1] 郭仲杰 余宁梅[2] 吴龙胜 ZHANG Qian;GUO ZhongJie;YU Ningmei;WU Longsheng(Departmnent of computer seaching and research,Xian Conseruatory of Music,Xi'an Shaanxi 710061,China;School of auomation and information engineeing,Xi'an Unirersiy of Technology,Xi'an Shaanxi 710048,China;School of Microelecronics,Xidian Unirersity,Xi'an Shani 710065,China)
机构地区:[1]西安音乐学院计算机教研室,陕西西安710061 [2]西安理工大学自动化与信息工程学院,陕西西安710048 [3]西安电子科技大学微电子学院,陕西西安710065
出 处:《传感技术学报》2021年第10期1307-1311,共5页Chinese Journal of Sensors and Actuators
基 金:国家自然科学基金面上项目(61771388);陕西省科技厅重点研发项目计划项目(2021GY-060);陕西省教育厅科学研究计划项目(19JC029)。
摘 要:针对CMOS图像传感器中传统的列级单斜式ADC在速度方面的不足和两步式ADC在斜坡间切换过程中的非线性问题,论文提出了一种基于时间共享与单区间的高速高精度列并行两步式斜坡ADC架构。采用像素电荷转移阶段的电位识别,实现了不消耗时间的粗量化;采用单区间高精度量化,解决了多斜坡之间的无缝衔接问题。所提出的方法在一款基于55 nm 1P4M工艺的2048×2048规模的CMOS图像传感器芯片中进行了有效性验证,结果表明,在12位分辨率下,该方法相较于传统的两步式结构,行时间可以压缩到500 ns,DNL和INL都可以控制到0.12LSB以内,单列功耗仅为16.5μW。In view of the speed deficiency of traditional column parallel single slope ADC in CMOS image sensor and the nonlinear problem of two-step ADC switching between slopes,a two-step slope ADC architecture based on time sharing and single interval high speed and high precision columns parallel two-step slope ADC is proposed in this paper.The potential recognition of pixel charge transfer phase is used to realize the coarse quantization without consuming time.The single interval high-precision quantization is used to solve the problem of joint between multiple slopes.The effectiveness of the proposed method is verified in a 2048 CMOS image sensor chip based on 55 nm 1 P4 M process.The results show that,compared with the traditional two-step structure,the row time of the proposed method can be speeded up to 500 ns at 12 bit resolution,the DNL and INL are both within 0.15 LSB,and the single column power consumption is only 16.5μW.
分 类 号:TN43[电子电信—微电子学与固体电子学]
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