检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
作 者:韩宁 李龙 刘新赞[2] 刘书焕[1] 马勇[1] 熊艳丽 李炳均 张国和[3] Carlo Ettore Fiorini 陈伟[5] HAN Ning;LI Long;LI Xinzan;LIU Shuhuan;MA Yong;XIONG Yanli;LI Bingjun;ZHANG Guohe;Carlo Ettore Fiorini;CHEN Wei(School of Energy and Power Eneineering,Xi’an Jiaotong University,Xi’an 710049,China;School of Information Technology,Hebei University of Economics and Business,Shijiazhuang 050061,China;School of Microelectronics,Xi’an Jiaotong University,Xi’an 710049,China;Department of Electronic Information and Bioengineering,Politecnico di Milano,Milan 20133,Italy;Northwest Institute of Nuclear Technology,Xi’an 710024,China)
机构地区:[1]西安交通大学能源与动力工程学院,陕西西安710049 [2]河北经贸大学信息技术学院,河北石家庄050061 [3]西安交通大学微电子学院,陕西西安710049 [4]米兰理工大学电子信息与生物工程系,意大利米兰20133 [5]西北核技术研究所,陕西西安710024
出 处:《原子能科学技术》2021年第12期2237-2250,共14页Atomic Energy Science and Technology
基 金:Supported by National Natural Science Foundation of China(12075180,11175139)。
摘 要:基于Si CMOS技术的前端读出ASIC主要是根据3D Si PIN阵列热中子探测器的输出信号特性设计的。所设计的读出ASIC的主要电路模块包括电荷灵敏放大器(CSA)、模拟开关设计、具有三级电荷灵敏自动转换的自动增益控制模块(AGC)、相关双采样(CDS)和基准电流源电路。仿真结果表明,前端电路的输入动态范围为10 fC~8.0 pC。根据热中子探测器输出信号特性设计的ASIC的3个增益系数分别为1.9 V/pC、0.39 V/pC和94 mV/pC。所设计的ASIC的积分非线性小于1%。单通道静态功耗约为5.36 mW。零输入探测器电容时的等效噪声电荷为241.6e;。计数率可达1 MHz。The front-end readout ASIC based on Si CMOS technology is primarily designed according to the output signal characteristics of the 3 DSi PIN array thermal neutron detector.The key circuit modules of the designed readout ASIC include the charge sensitive amplifier(CSA),the analog switch design,an automatic gain control module(AGC)with three-level charge sensitivity automatic switching,the correlation dual sampling(CDS)and reference current source circuit.The simulation results show that the input dynamic range of the front-end circuit is 10 fC-8.0 pC.The three gain coefficients of the designed ASIC according to the thermal neutron detector output signal characteristics are set as 1.9 V/pC,0.39 V/pC and 94 mV/pC,respectively.The integral nonlinearity of the designed ASIC is less than 1%.The single channel static power consumption is about 5.36 mW.The equivalent noise charge at zero input detector capacitance is 241.6 e-.The counting rate can arrive to the level of 1 MHz.
分 类 号:TL814[核科学技术—核技术及应用]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:216.73.216.38