基于IEEE1588协议的高精度时钟同步系统设计与实现  

Design and Implementation of High Precision Clock Synchronization System Based on IEEE1588 Protocol

作　　者：崔永俊 韩一德 郭峰 CUI Yong-jun;HAN Yi-de;GUO Feng(School of Instrument and Electronics,North University of China,Key Laboratory of Instrumentation Science&Dynamic Measurement,Ministry of Education,Key Laboratory of National Defense Science and Technology on Electronic Measurement,Taiyuan 030051,China)

机构地区：[1]中北大学仪器与电子学院,仪器科学与动态测试教育部重点实验室,电子测试技术国防科技重点实验室,山西太原030051

出　　处：《仪表技术与传感器》2021年第12期97-101,共5页Instrument Technique and Sensor

摘　　要：纯软件方式实现的IEEE1588协议时间戳标记位置处于数据链路层,受网络传输延迟不确定性的影响,时钟同步精度大多局限在μs级别。为了进一步提高多测点信号采集的同步性,应用于分布式振动信号同步采集,提高时钟同步精度。设计了硬件与软件结合的IEEE15888精密时间协议的高精度时钟同步系统。系统采用卫星时钟作为授时时钟源,STM32F407作为主控芯片,利用STM32F407中集成的MAC内核实现开源代码PTPd中IEEE1588最佳主时钟、本地时钟调节等算法的运行;采用支持硬件时间戳的DP83640物理层芯片实现RMII接口物理层标记时间戳,进一步降低了信号在网络传输过程中发生的随机性延迟,提高了时间同步的精度。经过同步信号输出测试,该系统时钟同步误差优于±200 ns,达到设计要求,应用性能良好。The IEEE1588 protocol time stamp mark position implemented in pure software mode is at the data link layer.Af⁃fected by the uncertainty of network transmission delay,the clock synchronization accuracy is mostly limited to the microsecond level.In order to further improve the synchronization of multi-point signal acquisition,it is applied to synchronous acquisition of distributed vibration signals to improve the accuracy of clock synchronization.The high⁃precision clock synchronization system of IEEE15888 precision time protocol combining hardware and software was designed.The system used satellite clock as the time service clock source,STM32F407 as the main control chip,and used the MAC core integrated in STM32F407 to realize the opera⁃tion of the IEEE1588 best master clock in the open source code PTPd,local clock adjustment and other algorithms,adopted the DP83640 physical layer chip that supported hardware time stamping to implement the RMII interface physical layer marking time stamp,which further reduced the random delay of the signal during network transmission and improved the accuracy of time syn⁃chronization.After the synchronization signal output test,the system clock synchronization error is better than±200 ns,which meets the design requirements and has good application performance.

关 键 词：IEEE1588协议 DP83640 PTPd 时钟同步 

分 类 号：TH714[机械工程—测试计量技术及仪器]