数字多道中双指数脉冲梯形成形算法的实现与测试  

Implementation and testing of double exponential pulse trapezoidal shaping algorithm in DMCA

作　　者：曾家骏 何剑锋[1,2,3,4] 袁兆林 汪雪元 祝翔 陈谢熠阳 Zeng Jiajun;He Jianfeng;Yuan Zhaolin;Wang Xueyuan;Zhu Xiang;Chen Xieyiyang(School of Information Engineering,East China University of Technology,Nanchang 330013,China;Big Data Technology Engineering Laboratory of Radiogeology,Nanchang 330013,China;Jiangxi Institute of Nuclear and Geoscience Data Science and Systems Engineering Technology,Nanchang 330013,China;National Key Laboratory of Radioactive Geology and Exploration Technology,Nanchang 330013,China)

机构地区：[1]东华理工大学信息工程学院,南昌330013 [2]江西省放射性地学大数据技术工程实验室,南昌330013 [3]江西省核地学数据科学与系统工程技术研究中心,南昌330013 [4]放射性地质与勘探技术国防重点学科实验室,南昌330013

出　　处：《电子测量与仪器学报》2021年第9期129-135,共7页Journal of Electronic Measurement and Instrumentation

基　　金：国家自然科学基金(11865002);江西省重点研发计划(20203BBG73069);江西省放射性地学大数据技术实验室开放基金(JELRGBDT201703)项目资助。

摘　　要：数字化谱仪的实际应用中探测器输出的脉冲信号可以近似看作双指数脉冲,由于探测器存在电荷收集时间等原因造成采集的脉冲幅度存在弹道亏损,不利于后续准确提取幅度,影响了探测系统的能量分辨率。在MATLAB中对理想双指数脉冲信号的梯形成形进行了仿真并在Simulink平台上建立模型使用理想双指数脉冲序列测试可行性;使用HDLCoder将Simulink逻辑模型转换成VerilogHDL代码并在ModelSim上进行测试。搭建硬件平台测试代码并将硬件平台应用到实测数据的处理中,通过串口分别发送单峰多峰脉冲测试,使用嵌入式逻辑分析仪捕捉成形数据同时通过串口输出成形后的数据观察,结果显示双指数脉冲信号梯形成形算法在FPGA中得到了较好的实现,恢复误差在0.2%以内。实现的硬件平台对存在弹道亏损的脉冲有较好的成形效果并具有一定的噪声滤除能力,可以作为数字多道脉冲幅度分析器设计开发的参考。In the actual application of the digital spectrometer,the pulse signal output by the detector can be approximately regarded as a double exponential pulse.Due to the charge collection time of the detector,the collected pulse amplitude has ballistic loss,which is not conducive to the subsequent accurate amplitude extraction and affects the energy resolution of detection system.In this paper,the trapezoidal forming of ideal double exponential pulse signal is simulated in MATLAB,and the model is built on Simulink platform,and the feasibility is tested by ideal double exponential pulse sequence.Use HDLCoder to convert Simulink logic model into VerilogHDL code and test it on ModelSim.Build the hardware platform test code and apply the hardware platform to the processing of the measured data,send single⁃peak and multi⁃peak pulse tests through the serial port,and use the embedded logic analyzer to capture the forming data and output the formed data observation through the serial port.The trapezoidal algorithm of exponential pulse signal has been well implemented in FPGA,and the recovery error is within 0.2%.The implemented hardware platform has a good shaping effect on pulses with ballistic losses and a certain noise filtering ability,which can be used as a reference for the design and development of digital multi⁃channel pulse amplitude analyzers.

关 键 词：梯形成形 双指数核脉冲信号 FPGA 多道脉冲幅度分析器 

分 类 号：TH842[机械工程—仪器科学与技术]